Solutions to a Complete Web Service Discovery and Composition. - Mohammad A. Makhzan; Kwei-Jay Lin (CEC/EEE, 2006)

Error-Aware Design. - Fadi J. Kurdahi; Ahmed M. Eltawil; Amin Khajeh Djahromi; Mohammad A. Makhzan; Stanley Cheng (DSD, 2007)

Limits on voltage scaling for caches utilizing fault tolerant techniques. - Mohammad A. Makhzan; Amin Khajeh; Ahmed M. Eltawil; Fadi J. Kurdahi (ICCD, 2007)

Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. - Houman Homayoun; Mohammad A. Makhzan; Alexander V. Veidenbaum (CASES, 2008)

Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. - Houman Homayoun; Sudeep Pasricha; Mohammad A. Makhzan; Alexander V. Veidenbaum (DAC, 2008)

ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. - Houman Homayoun; Mohammad A. Makhzan; Alexander V. Veidenbaum (ICCD, 2008)

Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. - Houman Homayoun; Sudeep Pasricha; Mohammad A. Makhzan; Alexander V. Veidenbaum (LCTES, 2008)

A centralized cache miss driven technique to improve processor power dissipation. - Houman Homayoun; Mohammad A. Makhzan; Jean-Luc Gaudiot; Alexander V. Veidenbaum (ICSAMOS, 2008)

Architectural and algorithm level fault tolerant techniques for low power high yield multimedia devices. - Mohammad A. Makhzan; Ahmed M. Eltawil; Fadi J. Kurdahi (ICSAMOS, 2008)

A fault tolerant cache architecture for sub 500mV operation: resizable data composer cache (RDC-cache). - Avesta Sasan; Houman Homayoun; Ahmed M. Eltawil; Fadi J. Kurdahi (CASES, 2009)

Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling. - Avesta Sasan; Houman Homayoun; Ahmed M. Eltawil; Fadi J. Kurdahi (DATE, 2009)

Fuzzy Based Trust Estimation for Congestion Control in Wireless Sensor Networks. - Mani Zarei; Amir Masoud Rahmani; Avesta Sasan; Mohammad Teshnehlab (INCoS, 2009)

A Low Power JPEG2000 Encoder With Iterative and Fault Tolerant Error Concealment. - Mohammad A. Makhzan; Amin Khajeh; Ahmed M. Eltawil; Fadi J. Kurdahi (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Multiple sleep modes leakage control in peripheral circuits of a all major SRAM-based processor units. - Houman Homayoun; Avesta Sasan; Aseem Gupta; Alexander V. Veidenbaum; Fadi J. Kurdahi; Nikil D. Dutt (Conf. Computing Frontiers, 2010)

RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor. - Houman Homayoun; Aseem Gupta; Alexander V. Veidenbaum; Avesta Sasan; Fadi J. Kurdahi; Nikil D. Dutt (HiPEAC, 2010)

Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management. - Houman Homayoun; Avesta Sasan; Jean-Luc Gaudiot; Alexander V. Veidenbaum (IEEE Trans. Very Large Scale Integr. Syst., 2011)

MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits. - Houman Homayoun; Avesta Sasan; Alexander V. Veidenbaum; Hsin-Cheng Yao; Shahin Golshan; Payam Heydari (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Inquisitive Defect Cache: A Means of Combating Manufacturing Induced Process Variation. - Avesta Sasan; Houman Homayoun; Ahmed M. Eltawil; Fadi J. Kurdahi (IEEE Trans. Very Large Scale Integr. Syst., 2011)

History & Variation Trained Cache (HVT-Cache): A process variation aware and fine grain voltage scalable cache with active access history monitoring. - Avesta Sasan; Houman Homayoun; Kiarash Amiri; Ahmed M. Eltawil; Fadi J. Kurdahi (ISQED, 2012)

Variation Trained Drowsy Cache (VTD-Cache): A History Trained Variation Aware Drowsy Cache for Fine Grain Voltage Scaling. - Avesta Sasan; Kiarash Amiri; Houman Homayoun; Ahmed M. Eltawil; Fadi J. Kurdahi (IEEE Trans. Very Large Scale Integr. Syst., 2012)

System and architecture level characterization of big data applications on big and little core server architectures. - Maria Malik; Setareh Rafatirah; Avesta Sasan; Houman Homayoun (IEEE BigData, 2015)

Energy-efficient acceleration of big data analytics applications using FPGAs. - Katayoun Neshatpour; Maria Malik; Mohammad Ali Ghodrat; Avesta Sasan; Houman Homayoun (IEEE BigData, 2015)

Resizable Data Composer (RDC) Cache: A Near-Threshold Cache Tolerating Process Variation via Architectural Fault Tolerance. - Avesta Sasan; Fadi J. Kurdahi; Ahmed M. Eltawil (Near Threshold Computing, 2016)

Erratum to: Chapter 4 Resizable Data Composer (RDC) Cache: A Near-Threshold Cache Tolerating Process Variation via Architectural Fault Tolerance. - Avesta Sasan; Fadi J. Kurdahi; Ahmed M. Eltawil (Near Threshold Computing, 2016)

Big data analytics on heterogeneous accelerator architectures. - Katayoun Neshatpour; Avesta Sasan; Houman Homayoun (CODES+ISSS, 2016)

Big biomedical image processing hardware acceleration: A case study for K-means and image filtering. - Katayoun Neshatpour; Arezou Koohi; Farnoud Farahmand; Rajiv V. Joshi; Setareh Rafatirad; Avesta Sasan; Houman Homayoun (ISCAS, 2016)

Characterizing Hadoop applications on microservers for performance and energy efficiency optimizations. - Maria Malik; Avesta Sasan; Rajiv V. Joshi; Setareh Rafatirah; Houman Homayoun (ISPASS, 2016)

Analyzing Hardware Based Malware Detectors. - Nisarg Patel; Avesta Sasan; Houman Homayoun (DAC, 2017)

Big vs little core for energy-efficient Hadoop computing. - Maria Malik; Katayoun Neshatpour; Tinoosh Mohsenin; Avesta Sasan; Houman Homayoun (DATE, 2017)

Machine Learning-Based Approaches for Energy-Efficiency Prediction and Scheduling in Composite Cores Architectures. - Hossein Sayadi; Nisarg Patel; Avesta Sasan; Houman Homayoun (ICCD, 2017)

Spatial and temporal scheduling of clock arrival times for IR hot-spot mitigation, reformulation of peak current reduction. - Bhoopal Gunna; Lakshmi Bhamidipati; Houman Homayoun; Avesta Sasan (ISLPED, 2017)

A Power Delivery Network and Cell Placement Aware IR-Drop Mitigation Technique: Harvesting Unused Timing Slacks to Schedule Useful Skews. - Lakshmi Bhamidipati; Bhoopal Gunna; Houman Homayoun; Avesta Sasan (ISVLSI, 2017)

Advances and throwbacks in hardware-assisted security: special session. - Ferdinand Brasser; Lucas Davi; Abhijitt Dhavlle; Tommaso Frassetto; Sai Manoj Pudukotai Dinakarrao; Setareh Rafatirad; Ahmad-Reza Sadeghi; Avesta Sasan; Hossein Sayadi; Shaza Zeitouni; Houman Homayoun (CASES, 2018)

Ensemble learning for effective run-time hardware-based malware detection: a comprehensive analysis and classification. - Hossein Sayadi; Nisarg Patel; Sai Manoj P. D.; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (DAC, 2018)

ICNN: An iterative implementation of convolutional neural networks to enable energy and computational complexity aware dynamic approximation. - Katayoun Neshatpour; Farnaz Behnia; Houman Homayoun; Avesta Sasan (DATE, 2018)

Design Space Exploration for Hardware Acceleration of Machine Learning Applications in MapReduce. - Katayoun Neshatpour; Hosein Mohammadi Makrani; Avesta Sasan; Hassan Ghasemzadeh 001; Setareh Rafatirad; Houman Homayoun (FCCM, 2018)

MUCH-SWIFT: A High-Throughput Multi-Core HW/SW Co-design K-means Clustering Architecture. - Hadi Mardani Kamali; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2018)

SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. - Shervin Roshanisefat; Hadi Mardani Kamali; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2018)

Low Power and Trusted Machine Learning. - Avesta Sasan; Qi Zhu 002; Yanzhi Wang; Jae-sun Seo; Tinoosh Mohsenin (ACM Great Lakes Symposium on VLSI, 2018)

Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes. - Shervin Roshanisefat; Harshith K. Thirumala; Kris Gaj; Houman Homayoun; Avesta Sasan (IOLTS, 2018)

LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. - Hadi Mardani Kamali; Kimia Zamiri Azar; Kris Gaj; Houman Homayoun; Avesta Sasan (ISVLSI, 2018)

Architectural considerations for FPGA acceleration of machine learning applications in MapReduce. - Katayoun Neshatpour; Hosein Mohammadi Makrani; Avesta Sasan; Hassan Ghasemzadeh 001; Setareh Rafatirad; Houman Homayoun (SAMOS, 2018)

Energy-efficient acceleration of MapReduce applications using FPGAs. - Katayoun Neshatpour; Maria Malik; Avesta Sasan; Setareh Rafatirad; Tinoosh Mohsenin; Hassan Ghasemzadeh 001; Houman Homayoun (J. Parallel Distributed Comput., 2018)

Hardware Accelerated Mappers for Hadoop MapReduce Streaming. - Katayoun Neshatpour; Maria Malik; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (IEEE Trans. Multi Scale Comput. Syst., 2018)

XPPE: cross-platform performance estimation of hardware accelerators using machine learning. - Hosein Mohammadi Makrani; Hossein Sayadi; Tinoosh Mohsenin; Setareh Rafatirad; Avesta Sasan; Houman Homayoun (ASP-DAC, 2019)

IR-ATA: IR annotated timing analysis, a flow for closing the loop between PDN design, IR analysis & timing closure. - Ashkan Vakil; Houman Homayoun; Avesta Sasan (ASP-DAC, 2019)

Adversarial Attack on Microarchitectural Events based Malware Detectors. - Sai Manoj Pudukotai Dinakarrao; Sairaj Amberkar; Sahil Bhat; Abhijitt Dhavlle; Hossein Sayadi; Avesta Sasan; Houman Homayoun; Setareh Rafatirad (DAC, 2019)

Full-Lock: Hard Distributions of SAT instances for Obfuscating Circuits using Fully Configurable Logic and Routing Blocks. - Hadi Mardani Kamali; Kimia Zamiri Azar; Houman Homayoun; Avesta Sasan (DAC, 2019)

2SMaRT: A Two-Stage Machine Learning-Based Approach for Run-Time Specialized Hardware-Assisted Malware Detection. - Hossein Sayadi; Hosein Mohammadi Makrani; Sai Manoj Pudukotai Dinakarrao; Tinoosh Mohsenin; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (DATE, 2019)

Threats on Logic Locking: A Decade Later. - Kimia Zamiri Azar; Hadi Mardani Kamali; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2019)

On Custom LUT-based Obfuscation. - Gaurav Kolhe; Sai Manoj P. D.; Setareh Rafatirad; Hamid Mahmoodi; Avesta Sasan; Houman Homayoun (ACM Great Lakes Symposium on VLSI, 2019)

Mitigating the Performance and Quality of Parallelized Compressive Sensing Reconstruction Using Image Stitching. - Mahmoud Namazi; Hosein Mohammadi Makrani; Zhi Tian; Setareh Rafatirad; Mohamad Hosein Akbari; Avesta Sasan; Houman Homayoun (ACM Great Lakes Symposium on VLSI, 2019)

Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality. - Gaurav Kolhe; Hadi Mardani Kamali; Miklesh Naicker; Tyler David Sheaves; Hamid Mahmoodi; Sai Manoj P. D.; Houman Homayoun; Setareh Rafatirad; Avesta Sasan (ICCAD, 2019)

ECoST: Energy-Efficient Co-Locating and Self-Tuning MapReduce Applications. - Maria Malik; Hassan Ghasemzadeh 001; Tinoosh Mohsenin; Rosario Cammarota; Liang Zhao 002; Avesta Sasan; Houman Homayoun; Setareh Rafatirad (ICPP, 2019)

Exploiting Energy-Accuracy Trade-off through Contextual Awareness in Multi-Stage Convolutional Neural Networks. - Katayoun Neshatpour; Farnaz Behnia; Houman Homayoun; Avesta Sasan (ISQED, 2019)

COMA: Communication and Obfuscation Management Architecture. - Kimia Zamiri Azar; Farnoud Farahmand; Hadi Mardani Kamali; Shervin Roshanisefat; Houman Homayoun; William Diehl; Kris Gaj; Avesta Sasan (RAID, 2019)

TCD-NPE: A Re-configurable and Efficient Neural Processing Engine, Powered by Novel Temporal-Carry-deferring MACs. - Ali Mirzaeian; Houman Homayoun; Avesta Sasan (ReConFig, 2019)

Pyramid: Machine Learning Framework to Estimate the Optimal Timing and Resource Usage of a High-Level Synthesis Design. - Hosein Mohammadi Makrani; Farnoud Farahmand; Hossein Sayadi; Sara Bondi; Sai Manoj Pudukotai Dinakarrao; Liang Zhao 002; Avesta Sasan; Houman Homayoun; Setareh Rafatirad (CoRR, 2019)

NESTA: Hamming Weight Compression-Based Neural Proc. Engine. - Ali Mirzaeian; Houman Homayoun; Avesta Sasan (CoRR, 2019)

SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks. - Kimia Zamiri Azar; Hadi Mardani Kamali; Houman Homayoun; Avesta Sasan (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019)

NESTA: Hamming Weight Compression-Based Neural Proc. EngineAli Mirzaeian. - Ali Mirzaeian; Houman Homayoun; Avesta Sasan (ASP-DAC, 2020)

Mitigating Cache-Based Side-Channel Attacks through Randomization: A Comprehensive System and Architecture Level Analysis. - Han Wang 020; Hossein Sayadi; Tinoosh Mohsenin; Liang Zhao 002; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (DATE, 2020)

On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. - Hadi Mardani Kamali; Kimia Zamiri Azar; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2020)

StealthMiner: Specialized Time Series Machine Learning for Run-Time Stealthy Malware Detection based on Microarchitectural Features. - Hossein Sayadi; Yifeng Gao; Hosein Mohammadi Makrani; Tinoosh Mohsenin; Avesta Sasan; Setareh Rafatirad; Jessica Lin 001; Houman Homayoun (ACM Great Lakes Symposium on VLSI, 2020)

Energy-Efficient Hardware for Language Guided Reinforcement Learning. - Aidin Shiri; Arnab Neelim Mazumder; Bharat Prakash; Nitheesh Kumar Manjunath; Houman Homayoun; Avesta Sasan; Nicholas R. Waytowich; Tinoosh Mohsenin (ACM Great Lakes Symposium on VLSI, 2020)

Comprehensive Evaluation of Machine Learning Countermeasures for Detecting Microarchitectural Side-Channel Attacks. - Han Wang 020; Hossein Sayadi; Avesta Sasan; Setareh Rafatirad; Tinoosh Mohsenin; Houman Homayoun (ACM Great Lakes Symposium on VLSI, 2020)

NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. - Kimia Zamiri Azar; Hadi Mardani Kamali; Houman Homayoun; Avesta Sasan (ICCAD, 2020)

InterLock: An Intercorrelated Logic and Routing Locking. - Hadi Mardani Kamali; Kimia Zamiri Azar; Houman Homayoun; Avesta Sasan (ICCAD, 2020)

Hybrid-Shield: Accurate and Efficient Cross-Layer Countermeasure for Run-Time Detection and Mitigation of Cache-Based Side-Channel Attacks. - Han Wang 020; Hossein Sayadi; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (ICCAD, 2020)

Phased-Guard: Multi-Phase Machine Learning Framework for Detection and Identification of Zero-Day Microarchitectural Side-Channel Attacks. - Han Wang 020; Hossein Sayadi; Gaurav Kolhe; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (ICCD, 2020)

HybriDG: Hybrid Dynamic Time Warping and Gaussian Distribution Model for Detecting Emerging Zero-Day Microarchitectural Side-Channel Attacks. - Han Wang 020; Hossein Sayadi; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (ICMLA, 2020)

SCARF: Detecting Side-Channel Attacks at Real-time using Low-level Hardware Features. - Han Wang 020; Hossein Sayadi; Setareh Rafatirad; Avesta Sasan; Houman Homayoun (IOLTS, 2020)

Code-Bridged Classifier (CBC): A Low or Negative Overhead Defense for Making a CNN Classifier Robust Against Adversarial Attacks. - Farnaz Behnia; Ali Mirzaeian; Mohammad Sabokrou; Sai Manoj P. D.; Tinoosh Mohsenin; Khaled N. Khasawneh; Liang Zhao 002; Houman Homayoun; Avesta Sasan (ISQED, 2020)

CSCMAC - Cyclic Sparsely Connected Neural Network Manycore Accelerator. - Hirenkumar Paneliya; Morteza Hosseini; Avesta Sasan; Houman Homayoun; Tinoosh Mohsenin (ISQED, 2020)

LASCA: Learning Assisted Side Channel Delay Analysis for Hardware Trojan Detection. - Ashkan Vakil; Farnaz Behnia; Ali Mirzaeian; Houman Homayoun; Naghmeh Karimi; Avesta Sasan (ISQED, 2020)

SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. - Hadi Mardani Kamali; Kimia Zamiri Azar; Houman Homayoun; Avesta Sasan (ISVLSI, 2020)

DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. - Shervin Roshanisefat; Hadi Mardani Kamali; Kimia Zamiri Azar; Sai Manoj Pudukotai Dinakarrao; Naghmeh Karimi; Houman Homayoun; Avesta Sasan (VTS, 2020)

Cognitive and Scalable Technique for Securing IoT Networks Against Malware Epidemics. - Sai Manoj Pudukotai Dinakarrao; Xiaojie Guo 002; Hossein Sayadi; Cameron Nowzari; Avesta Sasan; Setareh Rafatirad; Liang Zhao 002; Houman Homayoun (IEEE Access, 2020)

ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things. - Hadi Mardani Kamali; Kimia Zamiri Azar; Shervin Roshanisefat; Ashkan Vakil; Avesta Sasan (CoRR, 2020)

Learning Diverse Latent Representations for Improving the Resilience to Adversarial Attacks. - Ali Mirzaeian; Mohammad Sabokrou; Mohammad Khalooei; Jana Kosecka; Houman Homayoun; Tinoosh Mohsenin; Avesta Sasan (CoRR, 2020)

Cluster-Based Partitioning of Convolutional Neural Networks, A Solution for Computational Energy and Complexity Reduction. - Ali Mirzaeian; Masoud PourReza; Mohammad Sabokrou; Ashkan Vakil; Tinoosh Mohsenin; Houman Homayoun; Avesta Sasan (CoRR, 2020)

ICNN: The Iterative Convolutional Neural Network. - Katayoun Neshatpour; Houman Homayoun; Avesta Sasan (ACM Trans. Embed. Comput. Syst., 2020)

SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. - Shervin Roshanisefat; Hadi Mardani Kamali; Houman Homayoun; Avesta Sasan (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Evaluation of Machine Learning-based Detection against Side-Channel Attacks on Autonomous Vehicle. - Han Wang 020; Soheil Salehi; Hossein Sayadi; Avesta Sasan; Tinoosh Mohsenin; Sai Manoj P. D.; Setareh Rafatirad; Houman Homayoun (AICAS, 2021)

Learning Assisted Side Channel Delay Test for Detection of Recycled ICs. - Ashkan Vakil; Farzad Niknia; Ali Mirzaeian; Avesta Sasan; Naghmeh Karimi (ASP-DAC, 2021)

Securing Hardware via Dynamic Obfuscation Utilizing Reconfigurable Interconnect and Logic Blocks. - Gaurav Kolhe; Soheil Salehi; Tyler David Sheaves; Houman Homayoun; Setareh Rafatirad; Sai Manoj P. D.; Avesta Sasan (DAC, 2021)

A Reinforced Learning Solution for Clock Skew Engineering to Reduce Peak Current and IR Drop. - Sayed Aresh Beheshti-Shirazi; Ashkan Vakil; Sai Manoj P. D.; Ioannis Savidis; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2021)

Energy-Efficient and Adversarially Robust Machine Learning with Selective Dynamic Band Filtering. - Neha Nagarkar; Khaled N. Khasawneh; Setareh Rafatirad; Avesta Sasan; Houman Homayoun; Sai Manoj Pudukotai Dinakarrao (ACM Great Lakes Symposium on VLSI, 2021)

SAT-attack Resilience Measure for Access Restricted Circuits. - Saran Phatharodom; Avesta Sasan; Ioannis Savidis (ACM Great Lakes Symposium on VLSI, 2021)

RANE: An Open-Source Formal De-obfuscation Attack for Reverse Engineering of Logic Encrypted Circuits. - Shervin Roshanisefat; Hadi Mardani Kamali; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2021)

ChaoLock: Yet Another SAT-hard Logic Locking using Chaos Computing. - Hadi Mardani Kamali; Kimia Zamiri Azar; Houman Homayoun; Avesta Sasan (ISQED, 2021)

Diverse Knowledge Distillation (DKD): A Solution for Improving The Robustness of Ensemble Models Against Adversarial Attacks. - Ali Mirzaeian; Jana Kosecka; Houman Homayoun; Tinoosh Mohsenin; Avesta Sasan (ISQED, 2021)

Conditional Classification: A Solution for Computational Energy Reduction. - Ali Mirzaeian; Sai Manoj P. D.; Ashkan Vakil; Houman Homayoun; Avesta Sasan (ISQED, 2021)

Machine Learning-Assisted Website Fingerprinting Attacks with Side-Channel Information: A Comprehensive Analysis and Characterization. - Han Wang 020; Hossein Sayadi; Avesta Sasan; Sai Manoj P. D.; Setareh Rafatirad; Houman Homayoun (ISQED, 2021)

Cloak & Co-locate: Adversarial Railroading of Resource Sharing-based Attacks on the Cloud. - Hosein Mohammadi Makrani; Hossein Sayadi; Najmeh Nazari; Khaled N. Khasawneh; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (SEED, 2021)

From Cryptography to Logic Locking: A Survey on the Architecture Evolution of Secure Scan Chains. - Kimia Zamiri Azar; Hadi Mardani Kamali; Houman Homayoun; Avesta Sasan (IEEE Access, 2021)

AVATAR: NN-Assisted Variation Aware Timing Analysis and Reporting for Hardware Trojan Detection. - Ashkan Vakil; Ali Mirzaeian; Houman Homayoun; Naghmeh Karimi; Avesta Sasan (IEEE Access, 2021)

Enabling Micro AI for Securing Edge Devices at Hardware Level. - Han Wang 020; Hossein Sayadi; Sai Manoj Pudukotai Dinakarrao; Avesta Sasan; Setareh Rafatirad; Houman Homayoun (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

CPM: A general feature dependency pattern mining framework for contrast multivariate time series. - Qingzhe Li; Liang Zhao 002; Yi-Ching Lee; Avesta Sasan; Jessica Lin 001 (Pattern Recognit., 2021)

Adaptive Performance Modeling of Data-intensive Workloads for Resource Provisioning in Virtualized Environment. - Hosein Mohammadi Makrani; Hossein Sayadi; Najmeh Nazari; Sai Manoj Pudukotai Dinakarrao; Avesta Sasan; Tinoosh Mohsenin; Setareh Rafatirad; Houman Homayoun (ACM Trans. Model. Perform. Evaluation Comput. Syst., 2021)

Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits. - Kimia Zamiri Azar; Hadi Mardani Kamali; Shervin Roshanisefat; Houman Homayoun; Christos P. Sotiriou; Avesta Sasan (IEEE Trans. Very Large Scale Integr. Syst., 2021)

Silicon validation of LUT-based logic-locked IP cores. - Gaurav Kolhe; Tyler Sheaves; Kevin Immanuel Gubbi; Tejas Kadale; Setareh Rafatirad; Sai Manoj P. D.; Avesta Sasan; Hamid Mahmoodi; Houman Homayoun (DAC, 2022)

LOCK&ROLL: deep-learning power side-channel attack mitigation using emerging reconfigurable devices and logic locking. - Gaurav Kolhe; Tyler David Sheaves; Kevin Immanuel Gubbi; Soheil Salehi; Setareh Rafatirad; Sai Manoj P. D.; Avesta Sasan; Houman Homayoun (DAC, 2022)

RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis. - Tanmoy Chowdhury; Ashkan Vakil; Banafsheh Saber Latibari; Sayed Aresh Beheshti-Shirazi; Ali Mirzaeian; Xiaojie Guo 002; Sai Manoj P. D.; Houman Homayoun; Ioannis Savidis; Liang Zhao 002; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2022)

Survey of Machine Learning for Electronic Design Automation. - Kevin Immanuel Gubbi; Sayed Aresh Beheshti-Shirazi; Tyler David Sheaves; Soheil Salehi; Sai Manoj P. D.; Setareh Rafatirad; Avesta Sasan; Houman Homayoun (ACM Great Lakes Symposium on VLSI, 2022)

CAD-FSL: Code-Aware Data Generation based Few-Shot Learning for Efficient Malware Detection. - Sreenitha Kasarapu; Sanket Shukla; Rakibul Hassan; Avesta Sasan; Houman Homayoun; Sai Manoj P. D. (ACM Great Lakes Symposium on VLSI, 2022)

Adaptive-Gravity: A Defense Against Adversarial Samples. - Ali Mirzaeian; Zhi Tian; Sai Manoj P. D.; Banafsheh S. Latibari; Ioannis Savidis; Houman Homayoun; Avesta Sasan (ISQED, 2022)

Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated Circuits. - Vaibhav Venugopal Rao; Avesta Sasan; Ioannis Savidis (ISQED, 2022)

Repttack: Exploiting Cloud Schedulers to Guide Co-Location Attacks. - Chongzhou Fang; Han Wang 020; Najmeh Nazari; Behnam Omidi; Avesta Sasan; Khaled N. Khasawneh; Setareh Rafatirad; Houman Homayoun (NDSS, 2022)

Neuromorphic-Enabled Security for IoT. - Soheil Salehi; Tyler David Sheaves; Kevin Immanuel Gubbi; Sayed Arash Beheshti; Sai Manoj P. D.; Setareh Rafatirad; Avesta Sasan; Tinoosh Mohsenin; Houman Homayoun (NEWCAS, 2022)

Breaking the Design and Security Trade-off of Look-up-table-based Obfuscation. - Gaurav Kolhe; Tyler David Sheaves; Sai Manoj P. D.; Hamid Mahmoodi; Setareh Rafatirad; Avesta Sasan; Houman Homayoun (ACM Trans. Design Autom. Electr. Syst., 2022)

Gotcha! I Know What You Are Doing on the FPGA Cloud: Fingerprinting Co-Located Cloud FPGA Accelerators via Measuring Communication Links. - Chongzhou Fang; Ning Miao; Han Wang 020; Jiacheng Zhou; Tyler Sheaves; John Marty Emmert; Avesta Sasan; Houman Homayoun (CCS, 2023)

Securing AI Hardware: Challenges in Detecting and Mitigating Hardware Trojans in ML Accelerators. - Kevin Immanuel Gubbi; Inderpreet Kaur; Abdallah Hashem; Sai Manoj P. D.; Houman Homayoun; Avesta Sasan; Soheil Salehi (MWSCAS, 2023)

Advanced Reinforcement Learning Solution for Clock Skew Engineering: Modified Q-Table Update Technique for Peak Current and IR Drop Minimization. - Sayed Aresh Beheshti-Shirazi; Najmeh Nazari; Kevin Immanuel Gubbi; Banafsheh Saber Latibari; Setareh Rafatirad; Houman Homayoun; Avesta Sasan; Sai Manoj P. D. (IEEE Access, 2023)

SMOOT: Saliency Guided Mask Optimized Online Training. - Ali Karkehabadi; Houman Homayoun; Avesta Sasan (CoRR, 2023)

HW-V2W-Map: Hardware Vulnerability to Weakness Mapping Framework for Root Cause Analysis with GPT-assisted Mitigation Suggestion. - Yu-Zheng Lin; Muntasir Mamun; Muhtasim Alam Chowdhury; Shuyu Cai; Mingyu Zhu; Banafsheh Saber Latibari; Kevin Immanuel Gubbi; Najmeh Nazari Bavarsad; Arjun Caputo; Avesta Sasan; Houman Homayoun; Setareh Rafatirad; et al. (CoRR, 2023)

Hardware Trojan Detection Using Machine Learning: A Tutorial. - Kevin Immanuel Gubbi; Banafsheh Saber Latibari; Anirudh Srikanth; Tyler Sheaves; Sayed Arash Beheshti-Shirazi; Sai Manoj PD; Setareh Rafatirad; Avesta Sasan; Houman Homayoun; Soheil Salehi (ACM Trans. Embed. Comput. Syst., 2023)

Architectural Whispers: Robust Machine Learning Models Fingerprinting via Frequency Throttling Side-Channels. - Najmeh Nazari; Chongzhou Fang; Hosein Mohammadi Makrani; Behnam Omidi; Mahdi Eslamimehr; Setareh Rafatirad; Avesta Sasan; Hossein Sayadi; Khaled N. Khasawneh; Houman Homayoun (DAC, 2024)

SpecScope: Automating Discovery of Exploitable Spectre Gadgets on Black-Box Microarchitectures. - Najmeh Nazari; Behnam Omidi; Chongzhou Fang; Hosein Mohammadi Makrani; Setareh Rafatirad; Avesta Sasan; Houman Homayoun; Khaled N. Khasawneh (DATE, 2024)

FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropogation. - Ali Karkehabadi; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2024)

IRET: Incremental Resolution Enhancing Transformer. - Banafsheh Saber Latibari; Soheil Salehi; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2024)

Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures. - Najmeh Nazari; Kevin Immanuel Gubbi; Banafsheh Saber Latibari; Muhtasim Alam Chowdhury; Chongzhou Fang; Avesta Sasan; Setareh Rafatirad; Houman Homayoun; Soheil Salehi (ISCAS, 2024)

Transformers: A Security Perspective. - Banafsheh Saber Latibari; Najmeh Nazari; Muhtasim Alam Chowdhury; Kevin Immanuel Gubbi; Chongzhou Fang; Sujan Ghimire; Elahe Hosseini; Hossein Sayadi; Houman Homayoun; Soheil Salehi; Avesta Sasan (IEEE Access, 2024)

Generative AI-Based Effective Malware Detection for Embedded Computing Systems. - Sreenitha Kasarapu; Sanket Shukla; Rakibul Hassan; Avesta Sasan; Houman Homayoun; Sai Manoj Pudukotai Dinakarrao (CoRR, 2024)

Evolutionary Large Language Models for Hardware Security: A Comparative Survey. - Mohammad A. Makhzan; Hadi Mardani Kamali (CoRR, 2024)

Automated Hardware Logic Obfuscation Framework Using GPT. - Banafsheh Saber Latibari; Sujan Ghimire; Muhtasim Alam Chowdhury; Najmeh Nazari; Kevin Immanuel Gubbi; Houman Homayoun; Avesta Sasan; Soheil Salehi (CoRR, 2024)

FFCL: Forward-Forward Net with Cortical Loops, Training and Inference on Edge Without Backpropagation. - Ali Karkehabadi; Houman Homayoun; Avesta Sasan (CoRR, 2024)

Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach. - Kevin Immanuel Gubbi; Banafsheh Saber Latibari; Muhtasim Alam Chowdhury; Afrooz Jalilzadeh; Erfan Yazdandoost Hamedani; Setareh Rafatirad; Avesta Sasan; Houman Homayoun; Soheil Salehi (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Unified Gravity Loss for Robust Neural Networks Through Feature Space Optimization. - Ali Karkehabadi; Houman Homayoun; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2025)

Energy-Efficient Quantization-Aware Training with Dynamic Bit-Width Optimization. - Ali Karkehabadi; Avesta Sasan (ACM Great Lakes Symposium on VLSI, 2025)

Transformers for Secure Hardware Systems: Applications, Challenges, and Outlook. - Banafsheh Saber Latibari; Najmeh Nazari; Avesta Sasan; Houman Homayoun; Pratik Satam; Soheil Salehi; Hossein Sayadi (ACM Great Lakes Symposium on VLSI, 2025)

State of Hardware Fuzzing: Current Methods and the Potential of Machine Learning and Large Language Models. - Kevin Immanuel Gubbi; Mohammadnavid Tarighat; Arvind Sudarshan; Inderpreet Kaur; Pavan Dheeraj Kota; Avesta Sasan; Houman Homayoun (ISQED, 2025)

Optimizing Vision Transformers: Unveiling 'Focus and Forget' for Enhanced Computational Efficiency. - Banafsheh Saber Latibari; Houman Homayoun; Avesta Sasan (IEEE Access, 2025)