A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10. - Avi Miller; Yizhak Shifman; Yoav Weizman; Osnat Keren; Joseph Shor (CICC, 2019)

An SRAM PUF with 2 Independent Bits/Cell in 65nm. - Yizhak Shifman; Avi Miller; Yoav Weizman; Alexander Fish; Joseph Shor (ISCAS, 2019)

A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF. - Yizhak Shifman; Avi Miller; Osnat Keren; Yoav Weizman; Joseph Shor (IEEE Access, 2020)

A 2 Bit/Cell Tilting SRAM-Based PUF With a BER of 3.1E-10 and an Energy of 21 FJ/Bit in 65nm. - Yizhak Shifman; Avi Miller; Yoav Weizmann; Joseph Shor (IEEE Open J. Circuits Syst., 2020)

An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability. - Yizhak Shifman; Avi Miller; Osnat Keren; Yoav Weizman; Joseph Shor (IEEE Trans. Circuits Syst., 2020)