Optimizing VMIN of ROM Arrays Without Loss of Noise Margin. - Avijit Chakraborty; D. M. H. Walker (ACM Great Lakes Symposium on VLSI, 2015)

Intel nGraph: An Intermediate Representation, Compiler, and Executor for Deep Learning. - Scott Cyphers; Arjun K. Bansal; Anahita Bhiwandiwalla; Jayaram Bobba; Matthew Brookhart; Avijit Chakraborty; William Constable; Christian Convey; Leona Cook; Omar Kanawi; Robert Kimball; Jason Knight; et al. (CoRR, 2018)

Observability Driven Path Generation for Delay Test Coverage Improvement in Scan Limited Circuits. - Avijit Chakraborty; D. M. H. Walker (DFT, 2020)

Federated Learning Toolkit with Voice-based User Verification Demo. - Prathamesh Mandke; Rachel Oberst; Matthias Reisser; Avijit Chakraborty; Christos Louizos; Joseph Soriaga; Daniel Madrigal Diaz; Andre Manoel; Nalin Singal; Jeff Omhover; Robert Sim (INTERSPEECH, 2023)

Topological Heuristics for Scan Test Overhead Reduction. - Avijit Chakraborty; Duncan M. Hank Walker (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)