A Design Methodology for a Fully Synthesized High Speed DSP Core in a Deep Sub-Micron Technology. - Avinash K. Gautam; Jagdish C. Rao; Karthikeyan Madathil; Vilesh Shah; H. Udayakumar; Amitabh Menon; Subash Chandar G. (ICCD, 1999)

Automatic Generation of Tree Multipliers Using Placement-Driven Netlists. - Avinash K. Gautam; V. Visvanathan; S. K. Nandy 001 (ICCD, 1999)

A Design-in Methodology to Ensure First Time Success of Complex Digital Signal Processors. - Avinash K. Gautam; Jagdish C. Rao; Rohit Rathi; H. Udayakumar (VLSI Design, 1999)

A Framework for Cost vs. Performance Tradeoffs in the Design of Digital Signal Processor Cores. - Karthikeyan Madathil; Jagdish C. Rao; Subash Chandar G.; Amitabh Menon; Avinash K. Gautam; Amit M. Brahme; H. Udayakumar (VLSI Design, 2000)