A Scalable Architecture for Distributed Shared Memory Multiprocessors Using Optical Interconnects. - Avinash Karanth Kodi; Ahmed Louri (IPDPS, 2004)

An Optical Interconnection Network and a Modified Snooping Protocol for the Design of Large-Scale Symmetric Multiprocessors (SMPs). - Ahmed Louri; Avinash Karanth Kodi (IEEE Trans. Parallel Distributed Syst., 2004)

Design of a High-Speed Optical Interconnect for Scalable Shared-Memory Multiprocessors. - Avinash Karanth Kodi; Ahmed Louri (IEEE Micro, 2005)

A New Dynamic Bandwidth Re-Allocation Technique in Optically Interconnected High-Performance Computing Systems. - Avinash Karanth Kodi; Ahmed Louri (Hot Interconnects, 2006)

RAPID: Reconfigurable All-Photonic Interconnect for Parallel and Distributed Computers. - Avinash Karanth Kodi (2006)

Design of adaptive communication channel buffers for low-power area-efficient network-on-chip architecture. - Avinash Karanth Kodi; Ashwini Sarathy; Ahmed Louri (ANCS, 2007)

Implementation of Dynamic Bandwidth Re-allocation in Optical Interconnects using Microring Resonators. - Chander Kochar; Avinash Karanth Kodi; Ahmed Louri (Hot Interconnects, 2007)

Power-Aware Bandwidth-Reconfigurable Optical Interconnects for High-Performance Computing (HPC) Systems. - Avinash Karanth Kodi; Ahmed Louri (IPDPS, 2007)

Performance adaptive power-aware reconfigurable optical interconnects for high-performance computing (HPC) systems. - Avinash Karanth Kodi; Ahmed Louri (SC, 2007)

iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. - Avinash Karanth Kodi; Ashwini Sarathy; Ahmed Louri (ISCA, 2008)

Optisim: A System Simulation Methodology for Optically Interconnected HPC Systems. - Avinash Karanth Kodi; Ahmed Louri (IEEE Micro, 2008)

Adaptive Channel Buffers in On-Chip Interconnection Networks - A Power and Performance Analysis. - Avinash Karanth Kodi; Ashwini Sarathy; Ahmed Louri (IEEE Trans. Computers, 2008)

Design of a scalable nanophotonic interconnect for future multicores. - Avinash Karanth Kodi; Randy Morris (ANCS, 2009)

Adaptive inter-router links for low-power, area-efficient and reliable Network-on-Chip (NoC) architectures. - Avinash Karanth Kodi; Ashwini Sarathy; Ahmed Louri; Janet Meiling Wang (ASP-DAC, 2009)

Design of energy-efficient channel buffers with router bypassing for network-on-chips (NoCs). - Avinash Karanth Kodi; Ahmed Louri; Janet Meiling Wang (ISQED, 2009)

NBTI aware workload balancing in multi-core systems. - Jin Sun 006; Avinash Karanth Kodi; Ahmed Louri; Janet Meiling Wang (ISQED, 2009)

On-Chip photonic interconnects for scalable multi-core architectures. - Avinash Karanth Kodi; Randy Morris; Ahmed Louri; Xiang Zhang (NOCS, 2009)

Workload capacity considering NBTI degradation in multi-core systems. - Jin Sun 006; Roman L. Lysecky; Karthik Shankar; Avinash Karanth Kodi; Ahmed Louri; Janet Meiling Wang (ASP-DAC, 2010)

Power-Efficient and High-Performance Multi-level Hybrid Nanophotonic Interconnect for Multicores. - Randy Wayne Morris Jr.; Avinash Karanth Kodi (NOCS, 2010)

Special Issue on Network-on-Chips (NoCs). - Ahmed Louri; Avinash Karanth Kodi (J. Parallel Distributed Comput., 2010)

iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture. - Dominic DiTomaso; Avinash Karanth Kodi; Savas Kaya; David W. Matolak (Hot Interconnects, 2011)

Co-design of channel buffers and crossbar organizations in NoCs architectures. - Avinash Karanth Kodi; Randy Morris; Dominic DiTomaso; Ashwini Sarathy; Ahmed Louri (ICCAD, 2011)

Introduction to the special issue on Networks-on-Chip (NoC) of the Journal of Parallel and Distributed Computing (JPDC). - Ahmed Louri; Avinash Karanth Kodi (J. Parallel Distributed Comput., 2011)

Design of a performance enhanced and power reduced dual-crossbar Network-on-Chip (NoC) architecture. - Yixuan Zhang; Randy Wayne Morris Jr.; Avinash Karanth Kodi (Microprocess. Microsystems, 2011)

Power efficient photonic networks for many-core architectures. - Brian Neel; Randy Morris; Dominic DiTomaso; Avinash Karanth Kodi (IGCC, 2012)

3D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores. - Randy Morris; Avinash Karanth Kodi; Ahmed Louri (ICCD, 2012)

Energy-Efficient and Fault-Tolerant Unified Buffer and Bufferless Crossbar Architecture for NoCs. - Yixuan Zhang; Randy Morris; Dominic DiTomaso; Avinash Karanth Kodi (IPDPS Workshops, 2012)

Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault Tolerance. - Randy Morris; Avinash Karanth Kodi; Ahmed Louri (MICRO, 2012)

Evaluation of fault tolerant channel buffers for improving reliability in NoCs. - Dominic DiTomaso; Travis Boraten; Avinash Kodi; Ahmed Louri (MWSCAS, 2012)

Evaluation and performance analysis of energy efficient wireless NoC architecture. - Dominic DiTomaso; Soumyasanta Laha; Avinash Kodi; Savas Kaya; David Matolak (MWSCAS, 2012)

Energy efficient modulation for a wireless network-on-chip architecture. - Dominic DiTomaso; Soumyasanta Laha; Savas Kaya; David W. Matolak; Avinash Kodi (NEWCAS, 2012)

SPRINT: Scalable Photonic Switching Fabric for High-Performance Computing (HPC). - Brian Neel; Randy Morris; Dominic DiTomaso; Avinash Kodi (JOCN, 2012)

Wireless networks-on-chips: architecture, wireless channel, and devices. - David W. Matolak; Avinash Karanth Kodi; Savas Kaya; Dominic DiTomaso; Soumyasanta Laha; William Rayess (IEEE Wirel. Commun., 2012)

Energy-efficient Runtime Adaptive Scrubbing in fault-tolerant Network-on-Chips (NoCs) architectures. - Travis Boraten; Avinash Karanth Kodi (ICCD, 2013)

Design of a Concentrated Torus Topology with Channel Buffers and Efficient Crossbars in NoCs. - Dominic DiTomaso; Randy Morris; Evan Jolley; Ashwini Sarathy; Ahmed Louri; Avinash Karanth Kodi (IPDPS Workshops, 2013)

On ultra-short wireless interconnects for NoCs and SoCs: Bridging the 'THz Gap'. - Savas Kaya; Soumyasanta Laha; Avinash Kodi; Dominic DiTomaso; David Matolak; William Rayess (MWSCAS, 2013)

Energy-efficient adaptive wireless NoCs architecture. - Dominic DiTomaso; Avinash Karanth Kodi; David W. Matolak; Savas Kaya; Soumyasanta Laha; William Rayess (NOCS, 2013)

PROBE: Prediction-based optical bandwidth scaling for energy-efficient NoCs. - Li Zhou; Avinash Karanth Kodi (NOCS, 2013)

Evaluating the scalability and performance of 3D stacked reconfigurable nanophotonic interconnects. - Randy Morris; Avinash Karanth Kodi; Ahmed Louri (SLIP, 2013)

Channel modeling for wireless networks-on-chips. - David W. Matolak; Savas Kaya; Avinash Karanth Kodi (IEEE Commun. Mag., 2013)

Extending the Energy Efficiency and Performance With Channel Buffers, Crossbars, and Topology Analysis for Network-on-Chips. - Dominic DiTomaso; Randy Morris; Avinash Karanth Kodi; Ashwini Sarathy; Ahmed Louri (IEEE Trans. Very Large Scale Integr. Syst., 2013)

QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers. - Dominic DiTomaso; Avinash Karanth Kodi; Ahmed Louri (HPCA, 2014)

Workload assignment considering NBTI degradation in multicore systems. - Jin Sun 006; Roman L. Lysecky; Karthik Shankar; Avinash Karanth Kodi; Ahmed Louri; Janet Roveda (ACM J. Emerg. Technol. Comput. Syst., 2014)

Photonic Interconnects for Exascale and Datacenter Architectures. - Avinash Karanth Kodi; Brian Neel; William C. Brantley (IEEE Micro, 2014)

Three-Dimensional Stacked Nanophotonic Network-on-Chip Architecture with Minimal Reconfiguration. - Randy Morris; Avinash Karanth Kodi; Ahmed Louri; Ralph D. Whaley (IEEE Trans. Computers, 2014)

Extending the Performance and Energy-Efficiency of Shared Memory Multicores with Nanophotonic Technology. - Randy Morris; Evan Jolley; Avinash Karanth Kodi (IEEE Trans. Parallel Distributed Syst., 2014)

Dynamic Power Reduction Techniques in On-Chip Photonic Interconnects. - Brian Neel; Matthew Kennedy; Avinash Karanth Kodi (ACM Great Lakes Symposium on VLSI, 2015)

Cross-Chip: Low power processor-to-memory nanophotonic interconnect architecture. - Matthew Kennedy; Avinash Karanth Kodi (IGSC, 2015)

Power and performance analysis of scalable photonic networks for exascale architecture. - Avinash Karanth Kodi; Brian Neel; William C. Brantley (IGSC, 2015)

OWN: Optical and Wireless Network-on-Chip for Kilo-core Architectures. - Md. Ashif I. Sikder; Avinash Karanth Kodi; Matthew Kennedy; Savas Kaya; Ahmed Louri (Hot Interconnects, 2015)

Kilo-core Wireless Network-on-Chips (NoCs) Architectures. - Avinash Karanth Kodi; Md. Ashif I. Sikder; Dominic DiTomaso; Savas Kaya; Soumyasanta Laha; David W. Matolak; William Rayess (NANOCOM, 2015)

Bandwidth Adaptive Nanophotonic Crossbars with Clockwise/Counter-clockwise Optical Routing. - Matthew Kennedy; Avinash Karanth Kodi (VLSID, 2015)

Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures. - Dominic DiTomaso; Avinash Karanth Kodi; Ahmed Louri; Razvan C. Bunescu (IEEE Trans. Computers, 2015)

A New Frontier in Ultralow Power Wireless Links: Network-on-Chip and Chip-to-Chip Interconnects. - Soumyasanta Laha; Savas Kaya; David W. Matolak; William Rayess; Dominic DiTomaso; Avinash Karanth Kodi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

A-WiNoC: Adaptive Wireless Network-on-Chip Architecture for Chip Multiprocessors. - Dominic DiTomaso; Avinash Karanth Kodi; David W. Matolak; Savas Kaya; Soumyasanta Laha; William Rayess (IEEE Trans. Parallel Distributed Syst., 2015)

Packet security with path sensitization for NoCs. - Travis Boraten; Avinash Karanth Kodi (DATE, 2016)

An adaptive routing algorithm to improve lifetime reliability in NoCs architecture. - Juman Alshraiedeh; Avinash Kodi (DFT, 2016)

Secure Model Checkers for Network-on-Chip (NoC) Architectures. - Travis Boraten; Dominic DiTomaso; Avinash Karanth Kodi (ACM Great Lakes Symposium on VLSI, 2016)

Exploring Wireless Technology for Off-Chip Memory Access. - Md. Ashif I. Sikder; Avinash Kodi; William Rayess; Dominic DiTomaso; David W. Matolak; Savas Kaya (Hot Interconnects, 2016)

Mitigation of Denial of Service Attack with Hardware Trojans in NoC Architectures. - Travis Boraten; Avinash Karanth Kodi (IPDPS, 2016)

Dynamic error mitigation in NoCs using intelligent prediction techniques. - Dominic DiTomaso; Travis Boraten; Avinash Kodi; Ahmed Louri (MICRO, 2016)

Reconfigurable Optical and Wireless (R-OWN) Network-on-Chip for High Performance Computing. - Md. Ashif I. Sikder; Avinash Karanth Kodi; Ahmed Louri (NANOCOM, 2016)

Machine learning enabled power-aware Network-on-Chip design. - Dominic DiTomaso; Md. Ashif I. Sikder; Avinash Karanth Kodi; Ahmed Louri (DATE, 2017)

Ultra-compact sub-10nm logic circuits based on ambipolar SB-FinFETs. - Talha Furkan Canan; Savas Kaya; Avinash Kodi; Hao Xin; Ahmed Louri (MWSCAS, 2017)

CLAP-NET: Bandwidth adaptive optical crossbar architecture. - Matthew Kennedy; Avinash Karanth Kodi (J. Parallel Distributed Comput., 2017)

Antennas and Channel Characteristics for Wireless Networks on Chips. - William Rayess; David W. Matolak; Savas Kaya; Avinash Karanth Kodi (Wirel. Pers. Commun., 2017)

LEAD: learning-enabled energy-aware dynamic voltage/frequency scaling in NoCs. - Mark Clark; Avinash Kodi; Razvan C. Bunescu; Ahmed Louri (DAC, 2018)

Extending the Power-Efficiency and Performance of Photonic Interconnects for Heterogeneous Multicores with Machine Learning. - Scott Van Winkle; Avinash Karanth Kodi; Razvan C. Bunescu; Ahmed Louri (HPCA, 2018)

RETUNES: Reliable and Energy-Efficient Network-on-Chip Architecture. - Padmaja Bhamidipati; Avinash Karanth (ICCD, 2018)

10T and 8T Full Adders Based on Ambipolar XOR Gates with SB-FinFETs. - Talha Furkan Canan; Savas Kaya; Avinash Kodi; Hao Xin; Ahmed Louri (ICECS, 2018)

Scalable Power-Efficient Kilo-Core Photonic-Wireless NoC Architectures. - Avinash Kodi; Kyle Shifflet; Savas Kaya; Soumyasanta Laha; Ahmed Louri (IPDPS, 2018)

Sub-THz Tunable Push-Push Oscillators with FinFETs for Wireless NoCs. - Yunus Kelestemur; Soumyasanta Laha; Savas Kaya; Avinash Kodi; Hao Xin; Ahmed Louri (MWSCAS, 2018)

Securing NoCs Against Timing Attacks with Non-Interference Based Adaptive Routing. - Travis H. Boraten; Avinash Karanth Kodi (NOCS, 2018)

SHARP: Shared Heterogeneous Architecture with Reconfigurable Photonic Network-on-Chip. - Scott Vanwinkle; Avinash Karanth Kodi (ACM J. Emerg. Technol. Comput. Syst., 2018)

Mitigation of Hardware Trojan based Denial-of-Service attack for secure NoCs. - Travis Boraten; Avinash Kodi (J. Parallel Distributed Comput., 2018)

Runtime Techniques to Mitigate Soft Errors in Network-on-Chip (NoC) Architectures. - Travis Boraten; Avinash Karanth Kodi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

GARUDA: Designing Energy-Efficient Hardware Monitors From High-Level Policies for Secure Information Flow. - Seaghan Sefton; Taiman Siddiqui; Nathaniel St. Amour; Gordon Stewart 001; Avinash Karanth Kodi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

High-performance, Energy-efficient, Fault-tolerant Network-on-Chip Design Using Reinforcement Learnin. - Ke Wang 030; Ahmed Louri; Avinash Karanth; Razvan C. Bunescu (DATE, 2019)

IntelliNoC: a holistic design framework for energy-efficient and reliable on-chip communication for manycores. - Ke Wang 030; Ahmed Louri; Avinash Karanth; Razvan C. Bunescu (ISCA, 2019)

Limit of Hardware Solutions for Self-Protecting Fault-Tolerant NoCs. - Ahmed Louri; Jacques Henri Collet; Avinash Karanth (ACM J. Emerg. Technol. Comput. Syst., 2019)

Dynamic Voltage and Frequency Scaling in NoCs with Supervised and Reinforcement Learning Techniques. - Quintin Fettes; Mark Clark; Razvan C. Bunescu; Avinash Karanth; Ahmed Louri (IEEE Trans. Computers, 2019)

Sustainability in Network-on-Chips by Exploring Heterogeneity in Emerging Technologies. - Avinash Karanth; Savas Kaya; Md. Ashif I. Sikder; Daniel Carbaugh; Soumyasanta Laha; Dominic DiTomaso; Ahmed Louri; Hao Xin; JunQiang Wu (IEEE Trans. Sustain. Comput., 2019)

PIXEL: Photonic Neural Network Accelerator. - Kyle Shiflett; Dylan Wright; Avinash Karanth; Ahmed Louri (HPCA, 2020)

4-Input NAND and NOR Gates Based on Two Ambipolar Schottky Barrier FinFETs. - Talha Furkan Canan; Savas Kaya; Avinash Karanth; Ahmed Louri (ICECS, 2020)

DozzNoC: Reducing Static and Dynamic Energy in NoCs with Low-latency Voltage Regulators using Machine Learning. - Mark Clark; Yingping Chen; Avinash Karanth; Dongsheng Brian Ma; Ahmed Louri (IPDPS, 2020)

Reconfigurable Gates with Sub-10nm Ambipolar SB-FinFETs for Logic Locking & Obfuscation. - Talha Furkan Canan; Savas Kaya; Harsha Chenji; Avinash Karanth (MWSCAS, 2020)

Guest Editors' Introduction to the Special Issue on Machine Learning Architectures and Accelerators. - Xuehai Qian; Yanzhi Wang; Avinash Karanth (IEEE Trans. Computers, 2020)

Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via Reinforcement Learning. - Quintin Fettes; Avinash Karanth; Razvan C. Bunescu; Ahmed Louri; Kyle Shiflett (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Scaling Deep-Learning Inference with Chiplet-based Architecture and Photonic Interconnects. - Yuan Li 029; Ahmed Louri; Avinash Karanth (DAC, 2021)

Bitwise Neural Network Acceleration Using Silicon Photonics. - Kyle Shiflett; Avinash Karanth; Ahmed Louri; Razvan C. Bunescu (ACM Great Lakes Symposium on VLSI, 2021)

Dynamic Voltage and Frequency Scaling to Improve Energy-Efficiency of Hardware Accelerators. - Siqin Liu; Avinash Karanth (HiPC, 2021)

CSCNN: Algorithm-hardware Co-design for CNN Accelerators using Centrosymmetric Filters. - Jiajun Li; Ahmed Louri; Avinash Karanth; Razvan C. Bunescu (HPCA, 2021)

GCNAX: A Flexible and Energy-efficient Accelerator for Graph Convolutional Neural Networks. - Jiajun Li; Ahmed Louri; Avinash Karanth; Razvan C. Bunescu (HPCA, 2021)

WiNN: Wireless Interconnect based Neural Network Accelerator. - Siqin Liu; Sushanth Karmunchi; Avinash Karanth; Soumyasanta Laha; Savas Kaya (ICCD, 2021)

Albireo: Energy-Efficient Acceleration of Convolutional Neural Networks via Silicon Photonics. - Kyle Shiflett; Avinash Karanth; Razvan C. Bunescu; Ahmed Louri (ISCA, 2021)

SPACX: Silicon Photonics-based Scalable Chiplet Accelerator for DNN Inference. - Yuan Li 029; Ahmed Louri; Avinash Karanth (HPCA, 2022)

Reflections of Cybersecurity Workshop for K-12 Teachers and High School Students. - Chad Mourning; David Juedes; Allyson Hallman-Thrasher; Harsha Chenji; Savas Kaya; Avinash Karanth (SIGCSE (2), 2022)

Ascend: A Scalable and Energy-Efficient Deep Neural Network Accelerator With Photonic Interconnects. - Yuan Li 029; Ke Wang 030; Hao Zheng 005; Ahmed Louri; Avinash Karanth (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Exploiting Wireless Technology for Energy-Efficient Accelerators With Multiple Dataflows and Precision. - Siqin Liu; Talha Furkan Canan; Harshavardhan Chenji; Soumyasanta Laha; Savas Kaya; Avinash Karanth (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

HREN: A Hybrid Reliable and Energy-Efficient Network-on-Chip Architecture. - Padmaja Bhamidipati; Avinash Karanth (IEEE Trans. Emerg. Top. Comput., 2022)

SPRINT: A High-Performance, Energy-Efficient, and Scalable Chiplet-Based Accelerator With Photonic Interconnects for CNN Inference. - Yuan Li 029; Ahmed Louri; Avinash Karanth (IEEE Trans. Parallel Distributed Syst., 2022)

A Silicon Photonic Multi-DNN Accelerator. - Yuan Li 029; Ahmed Louri; Avinash Karanth (PACT, 2023)

Flumen: Dynamic Processing in the Photonic Interconnect. - Kyle Shiflett; Avinash Karanth; Razvan C. Bunescu; Ahmed Louri (ISCA, 2023)

DAGGER: Exploiting Language Semantics for Program Security in Embedded Systems. - Garret Cunningham; Harsha Chenji; David Juedes; Gordon Stewart 001; Avinash Karanth (ISQED, 2023)

Reflections of Cybersecurity Workshop for K-12 Teachers. - Chad Mourning; Harsha Chenji; Allyson Hallman-Thrasher; Savas Kaya; Nasseef Abukamail; David Juedes; Avinash Karanth (SIGCSE (1), 2023)

Reclaimer: A Reinforcement Learning Approach to Dynamic Resource Allocation for Cloud Microservices. - Quintin Fettes; Avinash Karanth; Razvan C. Bunescu; Brandon Beckwith; Sreenivas Subramoney (CoRR, 2023)

d-GUARD: Thwarting Denial-of-Service Attacks via Hardware Monitoring of Information Flow using Language Semantics in Embedded Systems. - Garett Cunningham; Harsha Chenji; David Juedes; Avinash Karanth (ASPDAC, 2024)

SNAC: Mitigation of Snoop-Based Attacks with Multi-Tier Security in NoC Architectures. - Siqin Liu; Saumya Chauhan; Avinash Karanth (ACM Great Lakes Symposium on VLSI, 2024)

HSCONN: Hardware-Software Co-Optimization of Self-Attention Neural Networks for Large Language Models. - Siqin Liu; Prakash Chand Kuve; Avinash Karanth (ACM Great Lakes Symposium on VLSI, 2024)

Training Photonic Mach Zehnder Meshes for Neural Network Acceleration. - Andy Wolff; Avinash Karanth (HiPC, 2024)

PCM Enabled Low-Power Photonic Accelerator for Inference and Training on Edge Devices. - Juliana Curry; Ahmed Louri; Avinash Karanth; Razvan C. Bunescu (IPDPS (Workshops), 2024)

SCORCH: Neural Architecture Search and Hardware Accelerator Co-design with Reinforcement Learning. - Siqin Liu; Avinash Karanth (ISQED, 2024)

Algorithmic Strategies for Sustainable Reuse of Neural Network Accelerators with Permanent Faults. - Youssef A. Ait Alama; Sampada Sakpal; Ke Wang 030; Razvan C. Bunescu; Avinash Karanth; Ahmed Louri (CoRR, 2024)

Editorial: EiC Farewell and Introduction of new EiC. - Avinash Karanth (IEEE Trans. Computers, 2024)

A High-Performance and Energy-Efficient Photonic Architecture for Multi-DNN Acceleration. - Yuan Li 029; Ahmed Louri; Avinash Karanth (IEEE Trans. Parallel Distributed Syst., 2024)

Illuminati: A Simulation Framework for Modeling and Evaluating Photonic Neural Networks. - Andy Wolff; Avinash Karanth (ISQED, 2025)

Language semantics to support secure computation and communication in embedded systems via hardware monitors. - Garett Cunningham; Siqin Liu; Harsha Chenji; David Juedes; Avinash Karanth (Integr., 2025)

MERIT: A Sustainable DNN Accelerator Design With Photonic Phase-Change Memory. - Yuan Li 029; Ahmed Louri; Avinash Karanth (IEEE Trans. Sustain. Comput., 2025)