Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh. - Matt Grange; Awet Yemane Weldezion; Dinesh Pamunuwa; Roshan Weerasekera; Zhonghai Lu; Axel Jantsch; Dave Shippen (3DIC, 2009)

3-D memory organization and performance analysis for multi-processor network-on-chip architecture. - Awet Yemane Weldezion; Zhonghai Lu; Roshan Weerasekera; Hannu Tenhunen (3DIC, 2009)

Scalability of network-on-chip communication architecture for 3-D meshes. - Awet Yemane Weldezion; Matt Grange; Dinesh Pamunuwa; Zhonghai Lu; Axel Jantsch; Roshan Weerasekera; Hannu Tenhunen (NOCS, 2009)

Optimal network architectures for minimizing average distance in k-ary n-dimensional mesh networks. - Matt Grange; Roshan Weerasekera; Dinesh Pamunuwa; Axel Jantsch; Awet Yemane Weldezion (NOCS, 2011)

A scalable multi-dimensional NoC simulation model for diverse spatio-temporal traffic patterns. - Awet Yemane Weldezion; Matt Grange; Dinesh Pamunuwa; Axel Jantsch; Hannu Tenhunen (3DIC, 2013)

Dark silicon aware power management for manycore systems under dynamic workloads. - Mohammad Hashem Haghbayan; Amir-Mohammad Rahmani; Awet Yemane Weldezion; Pasi Liljeberg; Juha Plosila; Axel Jantsch; Hannu Tenhunen (ICCD, 2014)

Dynamic power management for many-core platforms in the dark silicon era: A multi-objective control approach. - Amir-Mohammad Rahmani; Mohammad Hashem Haghbayan; Anil Kanduri; Awet Yemane Weldezion; Pasi Liljeberg; Juha Plosila; Axel Jantsch; Hannu Tenhunen (ISLPED, 2015)

Automated Power and Latency Management in Heterogeneous 3D NoCs. - Awet Yemane Weldezion; Masoumeh Ebrahimi; Masoud Daneshtalab; Hannu Tenhunen (NoCArc@MICRO, 2015)

Zero-load predictive model for performance analysis in deflection routing NoCs. - Awet Yemane Weldezion; Matt Grange; Axel Jantsch; Hannu Tenhunen; Dinesh Pamunuwa (Microprocess. Microsystems, 2015)

Exploring the Scalability and Performance of Networks-on-Chip with Deflection Routing in 3D Many-core Architecture. - Awet Yemane Weldezion (2016)