Efficient hardware implementations of high throughput SHA-3 candidates keccak, luffa and blue midnight wish for single- and multi-message hashing. - Abdulkadir Akin; Aydin Aysu; Onur Can Ulusel; Erkay Savas (SIN, 2010)

A low energy adaptive hardware for H.264 multiple reference frame motion estimation. - Aydin Aysu; Gokhan Sayilar; Ilker Hamzaoglu (IEEE Trans. Consumer Electron., 2011)

Digital fingerprints for low-cost platforms using MEMS sensors. - Aydin Aysu; Nahid Farhady Ghalaty; Zane R. Franklin; Moein Pahlavan Yali; Patrick Schaumont (WESS, 2013)

Low-cost and area-efficient FPGA implementations of lattice-based cryptography. - Aydin Aysu; Cameron Patterson; Patrick Schaumont (HOST, 2013)

PASC: Physically authenticated stable-clocked soc platform on low-cost FPGAs. - Aydin Aysu; Patrick Schaumont (ReConFig, 2013)

Three Design Dimensions of Secure Embedded Systems. - Patrick Schaumont; Aydin Aysu (SPACE, 2013)

Low cost FPGA design and implementation of a stereo matching system for 3D-TV applications. - Aydin Aysu; Murat Sayinta; Cevahir Cigla (VLSI-SoC, 2013)

Analyzing and eliminating the causes of fault sensitivity analysis. - Nahid Farhady Ghalaty; Aydin Aysu; Patrick Schaumont (DATE, 2014)

A low power adaptive H.264 video encoder hardware. - Ilker Hamzaoglu; Aydin Aysu; Onur Can Ulusel (ICCE-Berlin, 2014)

A Flexible and Compact Hardware Architecture for the SIMON Block Cipher. - Ege Gulcan; Aydin Aysu; Patrick Schaumont (LightSec, 2014)

SIMON Says: Break Area Records of Block Ciphers on FPGAs. - Aydin Aysu; Ege Gulcan; Patrick Schaumont (IEEE Embed. Syst. Lett., 2014)

SIMON Says, Break the Area Records for Symmetric Key Block Ciphers on FPGAs. - Aydin Aysu; Ege Gulcan; Patrick Schaumont (IACR Cryptol. ePrint Arch., 2014)

BitCryptor: Bit-Serialized Flexible Crypto Engine for Lightweight Applications. - Ege Gulcan; Aydin Aysu; Patrick Schaumont (INDOCRYPT, 2015)

End-to-end Design of a PUF-based Privacy Preserving Authentication Protocol. - Aydin Aysu; Ege Gulcan; Daisuke Moriyama; Patrick Schaumont; Moti Yung (IACR Cryptol. ePrint Arch., 2015)

Precomputation Methods for Faster and Greener Post-Quantum Cryptography on Emerging Embedded Platforms. - Aydin Aysu; Patrick Schaumont (IACR Cryptol. ePrint Arch., 2015)

BitCryptor: Bit-Serialized Compact Crypto Engine on Reconfigurable Hardware. - Ege Gulcan; Aydin Aysu; Patrick Schaumont (IACR Cryptol. ePrint Arch., 2015)

Hardware/software co-design of physical unclonable function based authentications on FPGAs. - Aydin Aysu; Patrick Schaumont (Microprocess. Microsystems, 2015)

The Future of Real-Time Security: Latency-Optimized Lattice-Based Digital Signatures. - Aydin Aysu; Bilgiday Yuce; Patrick Schaumont (ACM Trans. Embed. Comput. Syst., 2015)

A design method for remote integrity checking of complex PCBs. - Aydin Aysu; Shravya Gaddam; Harsha Mandadi; Carol Pinto; Luke Wegryn; Patrick Schaumont (DATE, 2016)

Secure and Private, yet Lightweight, Authentication for the IoT via PUF and CBKA. - Christopher Huth; Aydin Aysu; Jorge Guajardo; Paul Duplys; Tim Güneysu (ICISC, 2016)

Compact and low-power ASIP design for lightweight PUF-based authentication protocols. - Aydin Aysu; Ege Gulcan; Daisuke Moriyama; Patrick Schaumont (IET Inf. Secur., 2016)

Precomputation Methods for Hash-Based Signatures on Energy-Harvesting Platforms. - Aydin Aysu; Patrick Schaumont (IEEE Trans. Computers, 2016)

Resource-constrained and Resource-efficient Modern Cryptosystem Design. - Aydin Aysu (2016)

A new maskless debiasing method for lightweight physical unclonable functions. - Aydin Aysu; Ye Wang 014; Patrick Schaumont; Michael Orshansky (HOST, 2017)

Binary Ring-LWE hardware with power side-channel countermeasures. - Aydin Aysu; Michael Orshansky; Mohit Tiwari (DATE, 2018)

Horizontal side-channel vulnerabilities of post-quantum key exchange protocols. - Aydin Aysu; Youssef Tobah; Mohit Tiwari; Andreas Gerstlauer; Michael Orshansky (HOST, 2018)

Fresh re-keying with strong PUFs: A new approach to side-channel security. - Xiaodan Xi; Aydin Aysu; Michael Orshansky (HOST, 2018)

Fast and Efficient Implementation of Lightweight Crypto Algorithm PRESENT on FPGA through Processor Instruction Set Extension. - Abdullah Varici; Gurol Saglam; Seckin Ipek; Abdullah Yildiz; Sezer Gören 001; Aydin Aysu; Deniz Iskender; T. Baris Aktemur; H. Fatih Ugurdag (EWDTS, 2019)

Teaching the Next Generation of Cryptographic Hardware Design to the Next Generation of Engineers. - Aydin Aysu (ACM Great Lakes Symposium on VLSI, 2019)

Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems. - Shijia Wei; Aydin Aysu; Michael Orshansky; Andreas Gerstlauer; Mohit Tiwari (HOST, 2019)

MaskedNet: A Pathway for Secure Inference against Power Side-Channel Attacks. - Anuj Dubey; Rosario Cammarota; Aydin Aysu (CoRR, 2019)

A Flexible and Scalable NTT Hardware : Applications from Homomorphically Encrypted Deep Learning to Post-Quantum Cryptography. - Ahmet Can Mert; Emre Karabulut; Erdinç Öztürk; Erkay Savas; Michela Becchi; Aydin Aysu (DATE, 2020)

RANTT: A RISC-V Architecture Extension for the Number Theoretic Transform. - Emre Karabulut; Aydin Aysu (FPL, 2020)

MaskedNet: The First Hardware Inference Engine Aiming Power Side-Channel Protection. - Anuj Dubey; Rosario Cammarota; Aydin Aysu (HOST, 2020)

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. - Francesco Regazzoni 001; Shivam Bhasin; Amir Alipour; Ihab Alshaer; Furkan Aydin; Aydin Aysu; Vincent Beroulle; Giorgio Di Natale; Paul D. Franzon; David Hély; Naofumi Homma; Akira Ito 002; et al. (ICCAD, 2020)

BoMaNet: Boolean Masking of an Entire Neural Network. - Anuj Dubey; Rosario Cammarota; Aydin Aysu (ICCAD, 2020)

Efficacy of Satisfiability-Based Attacks in the Presence of Circuit Reverse-Engineering Errors. - Qinhan Tan; Seetal Potluri; Aydin Aysu (ISCAS, 2020)

SeqL: Secure Scan-Locking for IP Protection. - Seetal Potluri; Aydin Aysu; Akash Kumar 001 (ISQED, 2020)

DeePar-SCA: Breaking Parallel Architectures of Lattice Cryptography via Learning Based Side-Channel Attacks. - Furkan Aydin; Priyank Kashyap; Seetal Potluri; Paul D. Franzon; Aydin Aysu (SAMOS, 2020)

Trustworthy AI Inference Systems: An Industry Research View. - Rosario Cammarota; Matthias Schunter; Anand Rajan; Fabian Boemer; Ágnes Kiss; Amos Treiber; Christian Weinert; Thomas Schneider 003; Emmanuel Stapf; Ahmad-Reza Sadeghi; Daniel Demmler; Huili Chen; et al. (CoRR, 2020)

High-Level Synthesis of Number-Theoretic Transform: A Case Study for Future Cryptosystems. - Erdem Ozcan; Aydin Aysu (IEEE Embed. Syst. Lett., 2020)

Single-Trace Side-Channel Attacks on ω-Small Polynomial Sampling: With Applications to NTRU, NTRU Prime, and CRYSTALS-DILITHIUM. - Emre Karabulut; Erdem Alkim; Aydin Aysu (HOST, 2021)

An Efficient Non-Profiled Side-Channel Attack on the CRYSTALS-Dilithium Post-Quantum Signature. - Zhaohui Chen; Emre Karabulut; Aydin Aysu; Yuan Ma; Jiwu Jing (ICCD, 2021)

iTimed: Cache Attacks on the Apple A10 Fusion SoC. - Gregor Haas; Seetal Potluri; Aydin Aysu (IACR Cryptol. ePrint Arch., 2021)

Falcon Down: Breaking Falcon Post-Quantum Signature Scheme through Side-Channel Attacks. - Emre Karabulut; Aydin Aysu (IACR Cryptol. ePrint Arch., 2021)

Stealing Neural Network Models through the Scan Chain: A New Threat for ML Hardware. - Seetal Potluri; Aydin Aysu (IACR Cryptol. ePrint Arch., 2021)

2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning. - Priyank Kashyap; Furkan Aydin; Seetal Potluri; Paul D. Franzon; Aydin Aysu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols. - Furkan Aydin; Aydin Aysu; Mohit Tiwari; Andreas Gerstlauer; Michael Orshansky (ACM Trans. Embed. Comput. Syst., 2021)

High-Fidelity Model Extraction Attacks via Remote Power Monitors. - Anuj Dubey; Emre Karabulut; Amro Awad; Aydin Aysu (AICAS, 2022)

Exposing Side-Channel Leakage of SEAL Homomorphic Encryption Library. - Furkan Aydin; Aydin Aysu (ASHES@CCS, 2022)

PR Crisis: Analyzing and Fixing Partial Reconfiguration in Multi-Tenant Cloud FPGAs. - Emre Karabulut; Chandu Yuvarajappa; Mohammed Iliyas Shaik; Seetal Potluri; Amro Awad; Aydin Aysu (ASHES@CCS, 2022)

Multi-Tenant Cloud FPGAs: Side-Channel Security and Safety. - Aydin Aysu (CCSW, 2022)

FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS. - Archit Gajjar; Priyank Kashyap; Aydin Aysu; Paul D. Franzon; Sumon Dey; Chris Cheng (FCCM, 2022)

Hands-On Teaching of Hardware Security for Machine Learning. - Ashley Calhoun; Erick Ortega; Ferhat Yaman; Anuj Dubey; Aydin Aysu (ACM Great Lakes Symposium on VLSI, 2022)

Towards AI-Enabled Hardware Security: Challenges and Opportunities. - Hossein Sayadi; Mehrdad Aliasgari; Furkan Aydin; Seetal Potluri; Aydin Aysu; Jack Edmonds 002; Sara Tehranipoor (IOLTS, 2022)

RevEAL: Single-Trace Side-Channel Leakage of the SEAL Homomorphic Encryption Library. - Furkan Aydin; Emre Karabulut; Seetal Potluri; Erdem Alkim; Aydin Aysu (IACR Cryptol. ePrint Arch., 2022)

Apple vs. EMA: Electromagnetic Side Channel Attacks on Apple CoreCrypto. - Gregor Haas; Aydin Aysu (IACR Cryptol. ePrint Arch., 2022)

Single-Trace Side-Channel Attacks on Ï-Small Polynomial Sampling: With Applications to NTRU, NTRU Prime, and CRYSTALS-DILITHIUM. - Emre Karabulut; Erdem Alkim; Aydin Aysu (IACR Cryptol. ePrint Arch., 2022)

Guarding Machine Learning Hardware Against Physical Side-channel Attacks. - Anuj Dubey; Rosario Cammarota; Vikram B. Suresh; Aydin Aysu (ACM J. Emerg. Technol. Comput. Syst., 2022)

Efficient, Flexible, and Constant-Time Gaussian Sampling Hardware for Lattice Cryptography. - Emre Karabulut; Erdem Alkim; Aydin Aysu (IEEE Trans. Computers, 2022)

An Extensive Study of Flexible Design Methods for the Number Theoretic Transform. - Ahmet Can Mert; Emre Karabulut; Erdinç Öztürk; Erkay Savas; Aydin Aysu (IEEE Trans. Computers, 2022)

ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking. - Anuj Dubey; Afzal Ahmad; Muhammad Adeel Pasha; Rosario Cammarota; Aydin Aysu (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022)

SS-AXI: Secure and Safe Access Control Mechanism for Multi-Tenant Cloud FPGAs. - Emre Karabulut; Amro Awad; Aydin Aysu (ISCAS, 2023)

A Full-Stack Approach for Side-Channel Secure ML Hardware. - Anuj Dubey; Aydin Aysu (ITC, 2023)

A Survey of Software Implementations for the Number Theoretic Transform. - Ahmet Can Mert; Ferhat Yaman; Emre Karabulut; Erdinç Öztürk; Erkay Savas; Aydin Aysu (SAMOS, 2023)

Introduction to the Special Issue on the Digital Threats of Hardware Security. - Aydin Aysu; Scott R. Graham (DTRAP, 2023)

Hardware-Software Co-design for Side-Channel Protected Neural Network Inference. - Anuj Dubey; Rosario Cammarota; Avinash Varna 001; Raghavan Kumar; Aydin Aysu (IACR Cryptol. ePrint Arch., 2023)

A Hardware-Software Co-Design for the Discrete Gaussian Sampling of FALCON Digital Signature. - Emre Karabulut; Aydin Aysu (IACR Cryptol. ePrint Arch., 2023)

SeqL+: Secure Scan-Obfuscation With Theoretical and Empirical Validation. - Seetal Potluri; Shamik Kundu; Akash Kumar 001; Kanad Basu; Aydin Aysu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Extended Abstract: Pre-Silicon Vulnerability Assessment for AI/ML Hardware. - Furkan Aydin; Emre Karabulut; Aydin Aysu (ACM Great Lakes Symposium on VLSI, 2024)

An Open Source Ecosystem for Implementation Security Testing. - Aydin Aysu; Fatemeh Ganji; Trey Marcantonio; Patrick Schaumont (IACR Cryptol. ePrint Arch., 2024)

Masking FALCON's Floating-Point Multiplication in Hardware. - Emre Karabulut; Aydin Aysu (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2024)

Leaking secrets in homomorphic encryption with side-channel attacks. - Furkan Aydin; Aydin Aysu (J. Cryptogr. Eng., 2024)

Enabling Secure and Efficient Sharing of Accelerators in Expeditionary Systems. - Arsalan Ali Malik; Emre Karabulut; Amro Awad; Aydin Aysu (J. Hardw. Syst. Secur., 2024)

RD-FAXID: Ransomware Detection with FPGA-Accelerated XGBoost. - Archit Gajjar; Priyank Kashyap; Aydin Aysu; Paul Franzon; Yongjin Choi; Chris Cheng; Giacomo Pedretti; Jim Ignowski (ACM Trans. Reconfigurable Technol. Syst., 2024)

Quantum Leak: Timing Side-Channel Attacks on Cloud-Based Quantum Services. - Chao Lu; Esha Telang; Aydin Aysu; Kanad Basu (ACM Great Lakes Symposium on VLSI, 2025)

CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon. - Arsalan Ali Malik; Harshvadan Mihir; Aydin Aysu (IACR Cryptol. ePrint Arch., 2025)

Outrunning the Millennium FALCON: Speed Records for FALCON on FPGAs. - Sharath Pendyala; Rahul Magesh; Elif Bilge Kavun; Aydin Aysu (IACR Cryptol. ePrint Arch., 2025)

SHIFT SNARE: Uncovering Secret Keys in FALCON via Single-Trace Analysis. - Jinyi Qiu; Aydin Aysu (IACR Cryptol. ePrint Arch., 2025)

TPUXtract: An Exhaustive Hyperparameter Extraction Framework. - Ashley Kurian; Anuj Dubey; Ferhat Yaman; Aydin Aysu (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2025)

EPOCH: Enabling Preemption Operation for Context Saving in Heterogeneous FPGA Systems. - Arsalan Ali Malik; Emre Karabulut; Aydin Aysu (CoRR, 2025)

Honest to a Fault: Root-Causing Fault Attacks with Pre-Silicon RISC Pipeline Characterization. - Arsalan Ali Malik; Harshvadan Mihir; Aydin Aysu (CoRR, 2025)

Hardware-Enabled Mechanisms for Verifying Responsible AI Development. - Aidan O'Gara; Gabriel Kulp; Will Hodgkins; James Petrie; Vincent Immler; Aydin Aysu; Kanad Basu; Shivam Bhasin; Stjepan Picek; Ankur Srivastava 001 (CoRR, 2025)

Stochastic Training for Side-Channel Resilient AI. - Anuj Dubey; Aydin Aysu (CoRR, 2025)

GATEBLEED: Exploiting On-Core Accelerator Power Gating for High Performance & Stealthy Attacks on AI. - Joshua Kalyanapu; Farshad Dizani; Darsh Asher; Azam Ghanbari; Rosario Cammarota; Aydin Aysu; Samira Mirbagher Ajorpaz (CoRR, 2025)

THEMIS: Time, Heterogeneity, and Energy Minded Scheduling for Fair Multi-Tenant Use in FPGAs. - Emre Karabulut; Arsalan Ali Malik; Amro Awad; Aydin Aysu (IEEE Trans. Computers, 2025)