Arbitrate-and-move primitives for high throughput on-chip interconnection networks. - Aydin O. Balkan; Gang Qu 001; Uzi Vishkin (ISCAS (2), 2004)

A Mesh-of-Trees Interconnection Network for Single-Chip Parallel Processing. - Aydin O. Balkan; Gang Qu 001; Uzi Vishkin (ASAP, 2006)

Layout-Accurate Design and Implementation of a High-Throughput Interconnection Network for Single-Chip Parallel Processing. - Aydin O. Balkan; Michael N. Horak; Gang Qu 001; Uzi Vishkin (Hot Interconnects, 2007)

An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing. - Aydin O. Balkan; Gang Qu 001; Uzi Vishkin (DAC, 2008)

Mesh-of-Trees Interconnection Network for an Explicitly Multi-Threaded Parallel Computer Architecture. - Aydin O. Balkan (2008)

Mesh-of-Trees and Alternative Interconnection Networks for Single-Chip Parallelism. - Aydin O. Balkan; Gang Qu 001; Uzi Vishkin (IEEE Trans. Very Large Scale Integr. Syst., 2009)