Ayman A. Fayed

Orcid: 0000-0002-5305-8391

According to our database1, Ayman A. Fayed authored at least 45 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Spur-Free Switch-Mode Power Supplies.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

2022
A 600V Half-Bridge Power Stage Fully Integrated with 25V Gate-Drivers in SiC CMOS Technology.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

Bias Temperature Instability on SiC n- and p-MOSFETs for High Temperature CMOS Applications.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

2021
A Dual-Frequency Single-Inductor Single-Output DC-DC Converter Topology with Spur-Free Switching for Security Applications.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

SPICE Modeling and CMOS Circuit Development of a SiC Power IC Technology.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

2020
A 2-A 6-MHz Hysteretic Buck Converter with an 8-Bit Digital Jitter-Insensitive Frequency Correction Loop using Dual-Sided Hysteretic Band Modulation.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
Output Control Techniques for Dual-Frequency SIMO Buck Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Imbalanced High-Current Multi-Phase Buck Converters for High-Performance CPUs.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

An All-Passive Emulated Ripple Control Technique for Constant-On-Time Buck Converters in CCM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
An 8 A 100-MHz 4-Phase Buck Converter with Fast Dynamic Response and Enhanced Light-Load Efficiency.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

An Average Inductor Current Sensor with Enhanced Accuracy in DCM for Buck Converters.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

An on-chip resonant-gate-drive switched-capacitor converter for near-threshold computing achieving 70.2% efficiency at 0.92A/mm<sup>2</sup> current density and 0.4V output.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

An Accurate Sense-FET-based Inductor Current Sensor with Wide Sensing Range for Buck Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
A MPPT Circuit With 25 µW Power Consumption and 99.7% Tracking Efficiency for PV Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

A buck converter with optimized dynamic response using lag-lead active voltage positioning.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Tutorials 1: Switching noise mitigation for integrated dc-dc converters.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

A calibration-free low-power supply-pushing reduction circuit (SPRC) for LC VCOs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
A 1 A, Dual-Inductor 4-Output Buck Converter With 20 MHz/100 MHz Dual-Frequency Switching and Integrated Output Filters in 65 nm CMOS.
IEEE J. Solid State Circuits, 2016

An overview of the fundamentals of battery chargers.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Spur-free current-mode hysteretic boost converter for noise-sensitive loads.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

Power loss analysis in single-step, single-inductor energy-harvesting-based power supplies.
Proceedings of the IEEE 59th International Midwest Symposium on Circuits and Systems, 2016

2015
A Low-Power Dual-Frequency SIMO Buck Converter Topology With Fully-Integrated Outputs and Fast Dynamic Operation in 45 nm CMOS.
IEEE J. Solid State Circuits, 2015

On-chip input and ground ringing suppression in high-frequency buck converters.
Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

A 1A, 20MHz/100MHz dual-inductor 4-output buck converter with fully-integrated bond-wire-based output filters for ripple reduction.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
A load-pull approach using multi-frequency harmonic tuners for enhancing PAE and device model accuracy.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

A self-regulated 588 MHz buck regulator with on-chip passives and circuit stuffing in 65nm.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

Power conversion schemes in nanometer CMOS mixed-signal SoCs.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
PWM Control Architecture With Constant Cycle Frequency Hopping and Phase Chopping for Spur-Free Operation in Buck Regulators.
IEEE Trans. Very Large Scale Integr. Syst., 2013

Output switching noise spectral analysis and modeling in buck regulators.
Microelectron. J., 2013

Switching and conduction loss analysis of buck converters operating in DCM-only scenarios.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A Low-Noise PFM-Controlled Buck Converter for Low-Power Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Output spectrum analysis of buck converters in DCM with PFM control.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A Buck Converter With Reduced Output Spurs Using Asynchronous Frequency Hopping.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Spurious-noise-free buck regulator for direct powering of analog/RF loads using PWM control with random frequency hopping and random phase chopping.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
A Fully-Integrated Switched-Capacitor Step-Down DC-DC Converter With Digital Capacitance Modulation in 45 nm CMOS.
IEEE J. Solid State Circuits, 2010

A 0.16mm<sup>2</sup> completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

A 6mW 480MHz continuous time ΣΔ modulator with 65dB DR over 5MHz bandwidth in 65nm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2008
A Low-Voltage Low-Power CMOS Analog Adaptive Equalizer for UTP-5 Cables.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2007
A 3.7mW, 1.6V CMOS Analog Adaptive Equalizer for a 125Mbps Wire-Line Transceiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
A low-voltage, highly linear voltage-controlled transconductor.
IEEE Trans. Circuits Syst. II Express Briefs, 2005

2004
A digital tuning algorithm for on-chip resistors.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A data merging technique for high-speed low-power multiply accumulate units.
Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

2002
Noise-tolerant design and analysis for a low-voltage dynamic full adder cell.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A merged multiplier-accumulator for high speed signal processing applications.
Proceedings of the IEEE International Conference on Acoustics, 2002

2001
A low power 10-transistor full adder cell for embedded architectures.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001


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