Empirical investigation of the challenges of the existing tools used in global software development projects. - Mahmood Niazi; Sajjad Mahmood; Mohammad R. Alshayeb; Ayman Hroub (IET Softw., 2015)

Towards a Test Definition Language for Integrated Circuits. - Mohammad R. Alshayeb; Muhammad E. S. Elrabaa; Ayman Hroub; Amran Al-Aghbari; Aiman H. El-Maleh; Abdelhafid Bouhraoua (J. Circuits Syst. Comput., 2015)

Efficient Generation of Compact Execution Traces for Multicore Architectural Simulations. - Ayman Hroub; Muhammad E. S. Elrabaa; Muhamed F. Mudawar; Ahmad Khayyat (ACM Trans. Archit. Code Optim., 2017)

A Very Fast Trace-Driven Simulation Platform for Chip-Multiprocessors Architectural Explorations. - Muhammad E. S. Elrabaa; Ayman Hroub; Muhamed F. Mudawar; Amran Al-Aghbari; Mohammed Alasli; Ahmad Khayyat (IEEE Trans. Parallel Distributed Syst., 2017)

SecSoC: A Secure System on Chip Architecture for IoT Devices. - Ayman Hroub; Muhammad E. S. Elrabaa (HOST, 2022)

AUTG: An Automatic UVM-based TestBench Generator for VLSI Chip Design Verification. - Mohammad Ismael; Ayman Hroub; Abdellatif Abu-Issa (ICM, 2023)

Efficient CNN Hardware Architecture Based on Linear Approximation and Computation Reuse Technique. - Mohamed F. Tolba 002; Hani H. Saleh; Mahmoud Al-Qutayri; Ayman Hroub; Thanos Stouraitis (ICM, 2023)

SystemVerilog-SystemC TestBench Architecture for VLSI Chip Design Verification. - Mohammad Ismael; Ayman Hroub; Nasib Naser (VLSI-SoC, 2024)

Accelerating memory and I/O intensive HPC applications using hardware compression. - Saleh Alsaleh; Muhammad E. S. Elrabaa; Aiman El-Maleh; Khaled A. Daud; Ayman Hroub; Muhamed F. Mudawar; Thierry Tonellot (J. Parallel Distributed Comput., 2024)

Energy Efficient and Fast CNN Inference by Exploring Weight Approximation and Computational Reuse. - Mohamed F. Tolba 002; Hani H. Saleh; Baker Mohammad; Mahmoud Al-Qutayri; Ayman Hroub; Thanos Stouraitis (IEEE Trans. Artif. Intell., 2024)