A study of analog decision feedback equalization for ADC-Based serial link receivers. - Azad Mahmoudi; Pooya Torkzadeh; Massoud Dousti (Integr., 2019)

A 6-Bit 1.5-GS/s SAR ADC With Smart Speculative Two-Tap Embedded DFE in 130-nm CMOS for Wireline Receiver Applications. - Azad Mahmoudi; Pooya Torkzadeh; Massoud Dousti (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A FDCCII Based High CMRR CMIA Design, Compatible with Both Voltage and Current Input Signals. - Soma Ahmadi; Azad Mahmoudi; Dinesh Maddipatla; E. Khorami; Massood Z. Atashbar (EIT, 2022)