Design Space Exploration of Deeply Nested Loop 2D Filtering and 6 Level FSBM Algorithm Mapped onto Systolic Array. - B. Bala Tripura Sundari (VLSI Design, 2012)

A direct method for optimal VLSI realization of deeply nested n-D loop problems. - B. Bala Tripura Sundari; T. R. Padmanabhan (Microprocess. Microsystems, 2013)

Fpga implementation of fourier segmentation for empirical wavelet transform. - N. Pravin; S. K. Shishir; S. Anirudh; R. Srinath; B. Bala Tripura Sundari (ICACCI, 2017)

UVM Based Testbench Architecture for Coverage Driven Functional Verification of SPI Protocol. - Vineeth B; B. Bala Tripura Sundari (ICACCI, 2018)

Bilayer Graphene Field Effect Transistor Modelling with Improved Mobility Analysis. - Sai Akash Dusi; B. Bala Tripura Sundari (iSES, 2021)

Accuracy Analysis on Design of Stochastic Computing in Arithmetic Components and Combinational Circuit. - P. Ashok; B. Bala Tripura Sundari (Comput., 2023)