A Modified Genetic Algorithm for Evolution of Neural Network in Designing an Evolutionary Neuro-Hardware. - N. Mohankumar 003; B. Bhuvan; M. Nirmala Devi 001; S. Arumugam (GEM, 2008)

An alytical modeling of response time and full well capacity of a pinned photo diode. - K. Akshay; Parvathy R. Pillai; B. Bhuvan (DTIS, 2018)

A Low Power Readout Mechanism with Improved Low Light Performance in CMOS Image Sensors. - Uzma Khan; B. Bhuvan; Mukul Sarkar (IEEE SENSORS, 2018)

Design of Stable Error-Correction Ramp Generators Considering Process and Run-Time Variations. - Sankar R. S. Prasobh; L. Asish; B. Bhuvan (APCCAS, 2019)

System Level Design of a Novel CMOS Image Sensor with High Dynamic Range and Fill Factor. - K. Akshay; Parvathy R. Pillai; B. Bhuvan (TENCON, 2019)

High speed error correction in continuous-time ramp generators using loop gain optimization. - L. Asish; Sankar R. S. Prasobh; Aravind Krishnan; B. Bhuvan (TENCON, 2019)

A 1024-Input Multi-Stage Voltage-Mode WTA Circuit for Selective Attention Based Processing in Massive Parallel Sensing Applications. - P. K. Pandey; B. Bhuvan (iSES, 2024)