A self-bandwidth switching & area-efficient PLL using multiplexer-controlled frequency selector. - B. Dinesh Kumar 001; Sumit Pandey; Puneet Arora; Rahul Shrestha (ISED, 2017)

An Ultra-Fast Parallel Prefix Adder. - Kumar Sambhav Pandey; B. Dinesh Kumar 001; Neeraj Goel; Hitesh Shrimali (ARITH, 2019)

A 6-Bit, 29.56 fJ/Conv-Step, Voltage Scalable Flash-SAR Hybrid ADC in 28 nm CMOS. - B. Dinesh Kumar 001; Hitesh Shrimali; Navneet Gupta (ISCAS, 2019)

Analysis of Timing Error Due to Supply and Substrate Noise in an Inverter Based High-Speed Comparator. - Vijender Kumar Sharma; B. Dinesh Kumar 001; Muhammed Suhail Illikkal; Jai Narayan Tripathi; Navneet Gupta; Hitesh Shrimali (ISCAS, 2019)

Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS. - B. Dinesh Kumar 001; Sumit K. Pandey; Navneet Gupta; Hitesh Shrimali (Microelectron. J., 2020)

A Low-Power Quadrature LC-Oscillator Using Core-and-Coupling Current-Reuse. - B. Dinesh Kumar 001; Hitesh Shrimali; Nagarjuna Nallam (ISCAS, 2021)

Design and implementation of a second order PLL based frequency synthesizer for implantable medical devices. - B. Dinesh Kumar 001; Hitesh Shrimali (Integr., 2022)