An Efficient Biocryptosystem Based on the Iris Biometrics. - Ali Shojaee Bakhtiari; Ali Asghar Beheshti Shirazi; Babak Zamanlooy (PSIVT, 2007)

A Real Time Infrared Imaging System Based on DSP & FPGA. - Babak Zamanlooy; Vahid Hamiati Vaghef; Sattar Mirzakuchaki; Ali Shojaee Bakhtiari; Reza Ebrahimi Atani (PSIVT, 2007)

System-level design of low complexity CVNS feed forward neural network. - Mitra Mirhassani; Babak Zamanlooy (ISCAS, 2010)

Complexity Study of the Continuous Valued Number System Adders. - Babak Zamanlooy; Ashley Novak; Mitra Mirhassani (ISMVL, 2012)

Efficient hardware implementation of threshold neural networks. - Babak Zamanlooy; Mitra Mirhassani (NEWCAS, 2012)

Area efficient low-sensitivity lumped madaline based on Continuous Valued Number System. - Babak Zamanlooy; Mitra Mirhassani (ISCAS, 2014)

Area-efficient robust Madaline based on continuous valued number system. - Babak Zamanlooy; Mitra Mirhassani (Neurocomputing, 2014)

Efficient VLSI Implementation of Neural Networks With Hyperbolic Tangent Activation Function. - Babak Zamanlooy; Mitra Mirhassani (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Mixed-Signal VLSI Implementation of CVNS Artificial Neural Networks. - Babak Zamanlooy (2014)

CVNS Synapse Multiplier for Robust Neurochips With On-Chip Learning. - Babak Zamanlooy; Mitra Mirhassani (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Mixed-signal VLSI neural network based on Continuous Valued Number System. - Babak Zamanlooy; Mitra Mirhassani (Neurocomputing, 2017)

An Analog CVNS-Based Sigmoid Neuron for Precise Neurochips. - Babak Zamanlooy; Mitra Mirhassani (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Review of Arithmetic Operations Using the Continuous Valued Number System. - Babak Zamanlooy; Mitra Mirhassani; Majid Ahmadi (MWSCAS, 2018)

A 14-GHz Bang-Bang Digital PLL with sub-150fs Integrated Jitter for Wireline Applications in 7nm FinFET. - Dirk Pfaff; Robert Abbott; Xin-Jie Wang; Babak Zamanlooy; Shahaboddin Moazzeni; Raleigh Smith; Chih-Chang Lin (CICC, 2019)

8.4 A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2. - Marc-Andre LaCroix; Euhan Chong; Weilun Shen; Ehud Nir; Faisal Ahmed Musa; Haitao Mei 002; Mohammad-Mahdi Mohsenpour; Semyon Lebedev; Babak Zamanlooy; Carlos Carvalho; Qian Xin; Dmitry Petrov; et al. (ISSCC, 2021)

7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS. - Dirk Pfaff; Muhammad Nummer; Noman Hai; Peter Xia; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; Carson R. Dick; et al. (ISSCC, 2024)

A 224Gb/s 3pJ/bit 42dB Insertion Loss Post-FEC Error Free Transceiver in 3-nm FinFET CMOS (Invited). - Dirk Pfaff; Muhammad Nummer; Noman Hai; Jingjing Xia 001; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Choon-Haw CH Leong; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; et al. (CICC, 2025)

A 224 Gb/s 3 pJ/bit 40 dB Insertion Loss Transceiver in 3-nm FinFET CMOS. - Dirk Pfaff; Muhammad Nummer; Noman Hai; Jingjing Xia 001; Kai Ge Yang; Mohammad-Mahdi Mohsenpour; Choon-Haw C. H. Leong; Marc-Andre LaCroix; Babak Zamanlooy; Tom Eeckelaert; Dmitry Petrov; Mostafa Haroun; et al. (IEEE J. Solid State Circuits, 2025)