A Six-Segment SRRC Pulse Generator for IEEE 802.15.6 WBAN Standard. - Shaik Rafi Ahamed; Babita Jajodia; Anil Mahanta (BODYNETS, 2014)

Mixed-signal demodulator for IEEE 802.15.6 IR-UWB WBAN energy detection-based receiver. - Babita Jajodia; Anil Mahanta; Shaik Rafi Ahamed (IET Circuits Devices Syst., 2018)

Efficient Hardware Implementation of Cube Architecture using Yavadunam Sutra on FPGA. - Mansi Thakare; Palak Yash; Debaleena Chakraborty; Babita Jajodia (MWSCAS, 2021)

Towards an Optimal Hybrid Algorithm for EV Charging Stations Placement using Quantum Annealing and Genetic Algorithms. - Aman Chandra; Jitesh Lalwani; Babita Jajodia (CoRR, 2021)

ART-MAC: Approximate Rounding and Truncation based MAC Unit for Fault-Tolerant Applications. - Vishesh Mishra; Divy Pandey; Saurabh Singh; Sagar Satapathy; Kaustav Goswami 002; Babita Jajodia; Dip Sankar Banerjee (ISCAS, 2022)

Hardware Design of Optimized Large Integer Schoolbook Polynomial Multiplications on FPGA. - Monalisa Das; Babita Jajodia (ISOCC, 2022)

FPGA Implementation of Hybrid Karatsuba Multiplications for NIST Post-Quantum Cryptographic Hardware Primitives. - Monalisa Das; Babita Jajodia (ISOCC, 2022)

HPAM: An 8-bit High-Performance Approximate Multiplier Design for Error Resilient Applications. - Divy Pandey; Vishesh Mishra; Saurabh Singh; Sagar Satapathy; Babita Jajodia; Dip Sankar Banerjee (ISQED, 2022)

EFCSA: An Efficient Carry Speculative Approximate Adder with Rectification. - Saurabh Singh; Vishesh Mishra; Sagar Satapathy; Divy Pandey; Kaustav Goswami 002; Dip Sankar Banerjee; Babita Jajodia (ISQED, 2022)

Optimized Hardware Implementation of Vedic Binary Multiplier using Nikhilam Sutra on FPGA. - Palak Yash; Mansi Thakare; Babita Jajodia (LASCAS, 2022)

Area and Delay Trade-Offs in Three-Way Toom-Cook Large Integer Multipliers Implemented on FPGAs. - Monalisa Das; Babita Jajodia (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

ATP-Optimized Implementation of Four-Way Toom-Cook Multiplications on FPGAs for Large Integer Arithmetic. - Monalisa Das; Babita Jajodia (Circuits Syst. Signal Process., 2025)

Hybrid Recursive Karatsuba Multiplications on FPGAs. - Monalisa Das; Babita Jajodia (IEEE Embed. Syst. Lett., 2025)