Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design. - Khandoker Asif Faruque; Baishakhi Rani Biswas; A. B. M. Harun-ur Rashid (Circuits Syst. Signal Process., 2017)

Memristor-Specific Failures: New Verification Methods and Emerging Test Problems. - Baishakhi Rani Biswas; Sandeep Gupta 001 (VTS, 2022)

Synthesizable 10-bit Stochastic TDC Using Common-Mode Time Dithering and Passive Approximate Adder with 0.012mm2 Active Area in 12nm FinFET. - Qiaochu Zhang; Shiyu Su; Baishakhi Rani Biswas; Sandeep Gupta 001; Mike Shuo-Wei Chen (VLSI Technology and Circuits, 2024)

Systematic Generation of Memristor-Transistor Single-Phase Combinational Logic Cells. - Baishakhi Rani Biswas; Claire Yuan; Fangzhou Wang; Sandeep Gupta 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Stochastic TDC Using Common-Mode Time Dithering and Passive Approximate Adders. - Shiyu Su; Qiaochu Zhang; Baishakhi Rani Biswas; Sandeep K. Gupta 001; Mike Shuo-Wei Chen (IEEE J. Solid State Circuits, 2025)