Comb Filter for Elimination of Unwanted Power Line Interference in Biomedical Signal. - Rajeev K. Ranjan 002; Chandan Kr. Choubey; Bal Chand Nagar; Sajal K. Paul (J. Circuits Syst. Comput., 2016)

Dynamic Input Pruning-Based Low-Power and Error-Optimized Approximate Adder. - Lalit Bandil; Bal Chand Nagar (ICCCNT, 2024)

Design and Analysis of an Electronically Tunable VDTA-Based Quadrature Oscillator. - Shekhar Suman Borah; Mourina Ghosh; Bal Chand Nagar; Prabha Sundaravadivel (ISVLSI, 2024)

Modified restoring array-based power efficient approximate square root circuit and its application. - Lalit Bandil; Bal Chand Nagar (Integr., 2024)

Impact of Variability on Novel Transistor Configurations in Adder Circuits at 7nm FinFET Technology. - Umayia Mushtaq; Md. Waseem Akram; Dinesh Prasad; Aminul Islam; Bal Chand Nagar (J. Circuits Syst. Comput., 2024)

Hardware Implementation of Unsigned Approximate Hybrid Square Rooters for Error-Resilient Applications. - Lalit Bandil; Bal Chand Nagar (IEEE Trans. Computers, 2024)

SIEAA: Significant input extraction-based error optimized approximate adder for error resilient application. - Lalit Bandil; Bal Chand Nagar (Integr., 2025)

Realization of Electronically Tunable Dual-Memelement Emulator using FTFN and OTA. - Nagendra Kumar Vishwakarma; Bal Chand Nagar (J. Circuits Syst. Comput., 2025)