Testable Novel Parity-Preserving Reversible Gate and Low-Cost Quantum Decoder Design in 1D Molecular-QCA. - Neeraj Kumar Misra; Bibhash Sen; Subodh Wairya; Bandan Kumar Bhoi (J. Circuits Syst. Comput., 2017)

An efficient redundant binary adder with revised computational rules. - Ranjan Kumar Barik; Bandan Kumar Bhoi; Manoranjan Pradhan (Comput. Electr. Eng., 2018)

Analyzing Design Parameters of Nano-Magnetic Technology Based Converter Circuit. - Bandan Kumar Bhoi; Neeraj Kumar Misra; Shailesh Singh Chouhan; Sarthak Acharya (VDAT, 2019)

Fast signed multiplier using Vedic Nikhilam algorithm. - Satya Ranjan Sahu; Bandan Kumar Bhoi; Manoranjan Pradhan (IET Circuits Devices Syst., 2020)

Improved Redundant Binary Adder Realization in FPGA. - Satya Ranjan Sahu; Bandan Kumar Bhoi; Manoranjan Pradhan (J. Circuits Syst. Comput., 2021)

Content Addressable Memory Design in 3D pNML for Energy-Aware Sustainable Computing. - Nirupma Pathak; Bandan Kumar Bhoi; Neeraj Kumar Misra; Santosh Kumar (J. Circuits Syst. Comput., 2022)

Efficient architecture for arithmetic designs using perpendicular NanoMagnetic Logic. - Neeraj Kumar Misra; Bandan Kumar Bhoi (Nano Commun. Networks, 2023)

Utilizing a Novel Universal Quantum Gate in the Design of Fault-Tolerant Architecture. - Neeraj Kumar Misra; Bandan Kumar Bhoi; Sankit Ramkrishna Kassa (Nano Commun. Networks, 2024)

Design and Analysis of Area and Time Efficient Signed Square Architecture Using Nonconventional Method. - Niharika Behera; Manoranjan Pradhan; Bandan Kumar Bhoi (J. Circuits Syst. Comput., 2025)