An investigation on local minima of a Hopfield network for optimization circuits. - Bang W. Lee; Bing J. Sheu (ICNN, 1988)

An integrated-circuit reliability simulator-RELY. - Bing J. Sheu; Wen-Jay Hsu; Bang W. Lee (IEEE J. Solid State Circuits, 1989)

Design of a neural-based A/D converter using modified Hopfield network. - Bang W. Lee; Bing J. Sheu (IEEE J. Solid State Circuits, 1989)

VLSI image processor using analog programmable synapses and neurons. - Bang W. Lee; Ji-Chien Lee; Bing J. Sheu (IJCNN, 1990)

A high slew-rate CMOS amplifier for analog signal processing. - Bang W. Lee; Bing J. Sheu (IEEE J. Solid State Circuits, 1990)

Modified Hopfield neural networks for retrieving the optimal solution. - Bang W. Lee; Bing J. Sheu (IEEE Trans. Neural Networks, 1991)

General-purpose neural chips with electrically programmable synapses and gain-adjustable neurons. - Bang W. Lee; Bing J. Sheu (IEEE J. Solid State Circuits, 1992)

200 Mega Pixel Rate IDCT Processor for HDTVC Applications. - Chan S. Kim; Sang W. Song; Man Y. Kim; Young T. Han; Sang A. Kang; Bang W. Lee (ISCAS, 1993)

Compact and Fast Multiplier Using Dual Array Tree Structure. - Min C. Park; Bang W. Lee; Gwang Moon Kim; Dong H. Kim (ISCAS, 1993)

Paralleled hardware annealing for optimal solutions on electronic neural networks. - Bang W. Lee; Bing J. Sheu (IEEE Trans. Neural Networks, 1993)