A 42-Gb/s Decision Circuit in 0.13µm CMOS. - Bangli Liang; Tad A. Kwasniewski; Dianyong Chen (CNSR, 2008)

A 10-Gb/s backplane transmitter with a FIR pre-emphasis equalizer to suppress ISI at data centers and edges simultaneously. - Dianyong Chen; Bo Wang; Bangli Liang; Tad A. Kwasniewski (CCECE, 2009)

A full-rate truly monolithic CMOS CDR for low-cost applications. - Bangli Liang; Zhigong Wang; Dianyong Chen; Bo Wang; Guohui Situ; Tad A. Kwasniewski (CCECE, 2009)

A programmable pre-cursor ISI equalization circuit for high-speed serial link over highly lossy backplane channel. - Bo Wang; Dianyong Chen; Bangli Liang; Jinguang Jiang; Tad A. Kwasniewski (CCECE, 2009)

A monolithic high modulation efficiency CMOS laser diode / modulator driver. - Bangli Liang; Dianyong Chen; Bo Wang; Guohui Situ; Tad A. Kwasniewski; Zhigong Wang (ICT, 2009)

A Simulator for High-Speed Backplane Transceivers. - Dianyong Chen; Bo Wang; Bangli Liang; Tadeusz Kwasniewski (UKSim, 2009)

Modeling, Simulation and Analysis of High-Speed Serial Link Transceiver over Band-Limited Channel. - Bo Wang; Dianyong Chen; Bangli Liang; Jinguang Jiang; Tadeusz Kwasniewski (UKSim, 2009)

Optimized LNA for analog RF front-end circuit in brain-machine interface. - Haizheng Guo; Bo Wang; Bangli Liang; Tad A. Kwasniewski; Robert Sobot (WCNIS, 2010)

Research Progress, Hotspots, and Evolution of Nighttime Light Pollution: Analysis Based on WOS Database and Remote Sensing Data. - Chenhao Huang; Yang Ye; Yanhua Jin; Bangli Liang (Remote. Sens., 2023)