A 1.8V 2.4GHz CMOS on-chip impedance matching low noise amplifier for WLAN applications. - Baoyong Chi; Bingxue Shi (ISCAS (2), 2003)

A monolithic CMOS L band DAB receiver. - Ziqiang Wang; Baoyong Chi; Min Lin; Shuguang Han; Lu Liu; Jinke Yao; Zhihua Wang 001 (ASP-DAC, 2005)

Circuit implementation of multi-thresholded neuron (MTN) using BiCMOS technology. - Xiaolei Zhu; Jizhong Shen; Baoyong Chi; Zhihua Wang 001 (IJCNN, 2005)

A CMOS down-conversion micromixer for IEEE 802.11b WLAN transceivers. - Baoyong Chi; Bingxue Shi; Zhihua Wang 001 (ISCAS, 2006)

A 2.4GHz low power wireless transceiver analog front-end for endoscopy capsule system. - Baoyong Chi; Jinke Yao; Shuguang Han; Xiang Xie; Guolin Li; Zhihua Wang 001 (ISCAS, 2006)

A 4MHz Gm-C filter with on-chip frequency automatic tuning. - Jinke Yao; Baoyong Chi; Zhihua Wang 001 (ISCAS, 2006)

New implementation of injection locked technique and its application to low phase noise quadrature oscillators. - Baoyong Chi; Xiaolei Zhu; Ziqiang Wang; Zhihua Wang 001 (Microelectron. J., 2006)

A Fractional-N PLL for Digital Clock Generation With an FIR-Embedded Frequency Divider. - Baoyong Chi; Xueyi Yu; Woogeun Rhee; Zhihua Wang 001 (ISCAS, 2007)

Process Variation Compensation of a 2.4GHz LNA in 0.18um CMOS Using Digitally Switchable Capacitance. - Yike Cui; Baoyong Chi; Minjie Liu; Yulei Zhang; Yongming Li 004; Zhihua Wang 001; Patrick Chiang 001 (ISCAS, 2007)

A CMOS class-E Power Amplifiers with Power Control. - Tongqiang Gao; Dongmei Li; Baoyong Chi; Zhihua Wang 001 (ISCAS, 2007)

A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop. - Li Zhang 023; Baoyong Chi; Zhihua Wang 001; Hongyi Chen; Jinke Yao; Ende Wu (ISCAS, 2007)

Low power high data rate wireless endoscopy transceiver. - Baoyong Chi; Jinke Yao; Shuguang Han; Xiang Xie; Guolin Li; Zhihua Wang 001 (Microelectron. J., 2007)

Low-Power Transceiver Analog Front-End Circuits for Bidirectional High Data Rate Wireless Telemetry in Medical Endoscopy Applications. - Baoyong Chi; Jinke Yao; Shuguang Han; Xiang Xie; Guolin Li; Zhihua Wang 001 (IEEE Trans. Biomed. Eng., 2007)

A Mixed-Loop CMOS Analog GFSK Modulator With Tunable Modulation Index. - Shuguang Han; Baoyong Chi; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Bandwidth extension for ultra-wideband CMOS low-noise amplifiers. - Baoyong Chi; Chun Zhang; Zhihua Wang 001 (ISCAS, 2008)

An improved method of power control with CMOS class-E power amplifiers. - Tongqiang Gao; Chun Zhang; Baoyong Chi; Zhihua Wang 001 (ISCAS, 2008)

A fully integrated CMOS UHF RFID reader transceiver for handheld applications. - Jingchao Wang; Chun Zhang; Baoyong Chi; Ziqiang Wang; Zhihua Wang 001 (CICC, 2009)

New implementation of high linear LNA using derivative superposition method. - Shuguang Han; Baoyong Chi; Zhihua Wang 001 (Microelectron. J., 2009)

A 0.18-muhboxm CMOS GFSK Analog Front End Using a Bessel-Based Quadrature Discriminator With On-Chip Automatic Tuning. - Baoyong Chi; Jinke Yao; Patrick Chiang 001; Zhihua Wang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A Fast-Settling Wideband-IF ASK Baseband Circuit for a Wireless Endoscope Capsule. - Baoyong Chi; Jinke Yao; Patrick Chiang 001; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

A Low-Power High-Data-Rate ASK IF Receiver With a Digital-Control AGC Loop. - Xiaoman Wang; Baoyong Chi; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A dual-channel GPS/Compass/Galileo/GLONASS reconfigurable GNSS receiver in 65nm CMOS. - Nan Qi; Yang Xu 005; Baoyong Chi; Yang Xu 039; Xiaobao Yu; Xing Zhang; Zhihua Wang 001 (CICC, 2011)

A 0.13µm CMOS 1.5-to-2.15GHz low power transmitter front-end for SDR applications. - Zhigang Sun; Baoyong Chi; Chun Zhang; Zhihua Wang 001 (ISCAS, 2011)

Ultra-high-frequency radio frequency identification reader receiver with 10 dBm input P1 dB and -74 dBm sensitivity in 0.18 μm CMOS. - Xuguang Sun; Baoyong Chi; Chun Zhang; Ziqiang Wang; Zhihua Wang 001 (IET Circuits Devices Syst., 2011)

A 65 nm CMOS fully-integrated dynamic reconfigurable differential power amplifier with high gain in both bands. - Baoyong Chi; Kasra Omid-Zohoor; Zhihua Wang 001; S. Simon Wong (Microelectron. J., 2011)

A 0.1 4GHz receiver and 0.1 6GHz transmitter with reconfigurable 10 100MHz signal bandwidth in 65nm CMOS. - Xinwang Zhang; Yun Yin; Meng Cao; Zhigang Sun; Ling Fu; Zhaokang Xia; Hongxing Feng; Xing Zhang; Baoyong Chi; Ming Xu; Zhihua Wang 001 (CICC, 2012)

Power-scalable multi-mode reconfigurable continuous-time lowpass/quadrature bandpass sigma-delta modulator for zero/low-IF receivers. - Yang Xu 005; Baoyong Chi; Zhihua Wang 001 (ISCAS, 2012)

A hybrid approach to I/Q imbalance self-calibration in reconfigurable low-IF receivers. - Yang Xu 005; Nan Qi; Zhou Chen; Baoyong Chi; Zhihua Wang 001 (ISCAS, 2012)

Ultra-Wideband Circuits, Systems, and Applications. - Yo-Sheng Lin; Baoyong Chi; Hsien-Chin Chiu; Hsiao-Chin Chen (J. Electr. Comput. Eng., 2012)

A 1 V, 69-73 GHz CMOS power amplifier based on improved Wilkinson power combiner. - Haikun Jia; Baoyong Chi; Lixue Kuang; Zhihua Wang 001 (Microelectron. J., 2012)

A Dual-Channel Compass/GPS/GLONASS/Galileo Reconfigurable GNSS Receiver in 65 nm CMOS With On-Chip I/Q Calibration. - Nan Qi; Yang Xu 005; Baoyong Chi; Yang Xu 039; Xiaobao Yu; Xing Zhang; Ni Xu; Patrick Chiang 001; Woogeun Rhee; Zhihua Wang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Power-Scalable, Complex Bandpass/Low-Pass Filter With I/Q Imbalance Calibration for a Multimode GNSS Receiver. - Yang Xu 005; Baoyong Chi; Xiaobao Yu; Nan Qi; Patrick Chiang 001; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

An asymmetric dual-channel reconfigurable receiver for GNSS in 180nm CMOS. - Nan Qi; Baoyong Chi; Yang Xu 005; Zhou Chen; Jun Xie; Yang Xu 039; Zheng Song 002; Zhihua Wang 001 (CICC, 2013)

A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations. - Nan Qi; Baoyong Chi; Yang Xu 039; Zhou Chen; Yang Xu 005; Jun Xie; Zheng Song 002; Zhihua Wang 001 (ESSCIRC, 2013)

A multi-mode complex bandpass filter with gm-assisted power optimization and I/Q calibration. - Nan Qi; Zheng Song 002; Baoyong Chi; Albert Z. Wang; Tianling Ren; Zhihua Wang 001 (ISCAS, 2013)

Design and analysis of full-chip HV ESD protection in BCD30V for mixed-signal ICs. - Shijun Wang; Fai Yao; Li Wang 058; Rui Ma 003; C. Zhang; Zongyu Dong; Albert Z. Wang; Zitao Shi; Yuhua Cheng; Baoyong Chi; Tianling Ren (ISCAS, 2013)

A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication in 65nm CMOS. - Xiaobao Yu; Baoyong Chi; Meng Wei 001; Albert Z. Wang; Tianling Ren; Zhihua Wang 001 (ISCAS, 2013)

A 0.1-1.5GHz dual-mode Class-AB/Class-F power amplifier in 65nm CMOS. - Yun Yin; Baoyong Chi; Zhihua Wang 001 (MWSCAS, 2013)

Lifetime tracing of cardiopulmonary sounds with ultra-low-power sound sensor stick connected to wireless mobile network. - Zhihua Wang 001; Hanjun Jiang; Kai Yang; Lingwei Zhang 001; Jianjun Wei; Fule Li; Baoyong Chi; Chun Zhang; Shouhao Wu; Qingliang Lin; Wen Jia (NEWCAS, 2013)

Post-Si Programmable ESD Protection Circuit Design: Mechanisms and Analysis. - Xin Wang 031; Zitao Shi; Jian Liu 027; Lin Lin 011; Hui Zhao 014; Li Wang 058; Rui Ma 003; Chen Zhang 017; Zongyu Dong; Siqiang Fan; He Tang; Albert Z. Wang; et al. (IEEE J. Solid State Circuits, 2013)

A Reconfigurable Sliding-IF Transceiver for 400 MHz/2.4 GHz IEEE 802.15.6/ZigBee WBAN Hubs With Only 21% Tuning Range VCO. - Lingwei Zhang 001; Hanjun Jiang; Jianjun Wei; Jingjing Dong; Fule Li; Weitao Li; Jia Gao; Jianwei Cui; Baoyong Chi; Chun Zhang; Zhihua Wang 001 (IEEE J. Solid State Circuits, 2013)

A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers. - Zheng Song 002; Nan Qi; Baoyong Chi; Zhihua Wang 001 (ASP-DAC, 2014)

A fully-integrated reconfigurable dual-band transceiver for short range wireless communication in 180nm CMOS. - Xiaobao Yu; Meng Wei 001; Yun Yin; Ying Song; Siyang Han; Qiongbing Liu; Zongming Jin; Xiliang Liu; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2014)

A 0.1-1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration. - Xinwang Zhang; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2014)

A 0.1-5GHz flexible SDR receiver in 65nm CMOS. - Xinwang Zhang; Yang Xu 005; Bingqiao Liu; Qian Yu; Siyang Han; Qiongbing Liu; Zehong Zhang; Yanqiang Gao; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2014)

An efficiency-enhanced 2.4GHz stacked CMOS power amplifier with mode switching scheme for WLAN applications. - Yun Yin; Baoyong Chi; Xiaobao Yu; Wen Jia; Zhihua Wang 001 (CICC, 2014)

Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. - Li Wang 058; Rui Ma 003; Chen Zhang 017; Zongyu Dong; Fei Lu 004; Albert Z. Wang; Xin Wang 031; Jian Liu 027; Siqiang Fan; He Tang; Baoyong Chi; Liji Wu; et al. (ISCAS, 2014)

-80dBm∼0dBm dynamic range, 30mV/dB detection sensitivity piecewise RSSI for SDR/CR receivers. - Xinwang Zhang; Baoyong Chi; Bingqiao Liu; Zhihua Wang 001 (MWSCAS, 2014)

A 77 GHz FMCW radar transmitter with reconfigurable power amplifier in 65 nm CMOS. - Haikun Jia; Baoyong Chi; Lixue Kuang; Zhihua Wang 001 (Microelectron. J., 2014)

A 38- to 40-GHz Current-Reused Active Phase Shifter Based on the Coupled Resonator. - Haikun Jia; Baoyong Chi; Lixue Kuang; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

A 0.1-5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications. - Yun Yin; Baoyong Chi; Yanqiang Gao; Xiaodong Liu; Zhihua Wang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A Reconfigurable Dual-Mode CMOS Power Amplifier With Integrated T/R Switch for 0.1-1.5-GHz Multistandard Applications. - Yun Yin; Baoyong Chi; Zhaokang Xia; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

A 60-GHz wireless transceiver with dual-mode power amplifier for IEEE 802.11ad in 65nm CMOS. - Baoyong Chi; Lixue Kuang; Haikun Jia; Zhiping Wang; Zhihua Wang 001 (ASICON, 2015)

Analysis and design of a high linearity quadrature demodulator based on SiGe BiCMOS process. - Yadi Guo; Renyuan Chang; Jun Fu 010; Baoyong Chi; Yudong Wang 001 (ASICON, 2015)

A reconfigurable analog baseband for low-power Wi-Fi receiver. - Jiachen Hao; Zheng Song 002; Baoyong Chi (ASICON, 2015)

A 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS. - Bing Lyu; Yun Yin; Xiaobao Yu; Baoyong Chi (ASICON, 2015)

A 100M-1.5 GHz harmonic-rejection SDR receiver front-end. - Feng Ma; Xin-Wang Zhang; Baoyong Chi (ASICON, 2015)

A 1/2/4MHz multi-mode reconfigurable lowpass/complex bandpass CT ΣΔ modulator for short range wireless receiver. - Guodong Zhu; Junfeng Zhang; Yang Xu 005; Zehong Zhang; Baoyong Chi (ASICON, 2015)

A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS. - Haikun Jia; Baoyong Chi; Lixue Kuang; Wei Zhu; Zhiping Wang; Feng Ma; Zhihua Wang 001 (A-SSCC, 2015)

A 180nm CMOS wireless transceiver by utilizing guard band for narrowband IoT applications. - Zheng Song 002; Xiliang Liu; Zongming Jin; Xiaokun Zhao; Qiongbing Liu; Yun Yin; Baoyong Chi (A-SSCC, 2015)

Relay-Based Cooperative Spectrum Sensing with Improved Energy Detection In Cognitive Radio. - Oluyomi Simpson; Yusuf Abdulkadir; Yichuang Sun; Baoyong Chi (BWCCA, 2015)

A 0.1-5.0GHz self-calibrated SDR transmitter with -62.6dBc CIM3 in 65nm CMOS. - Yun Yin; Yanqiang Gao; Zhihua Wang 001; Baoyong Chi (CICC, 2015)

An 8.2 GHz triple coupling low-phase-noise class-F QVCO in 65nm CMOS. - Haikun Jia; Baoyong Chi; Zhihua Wang 001 (ESSCIRC, 2015)

A 0.5-30GHz wideband differential CMOS T/R switch with independent bias and leakage cancellation techniques. - Xinwang Zhang; Yichuang Sun; Zhihua Wang 001; Baoyong Chi (ISCAS, 2015)

25.6 A 70.5-to-85.5GHz 65nm phase-locked loop with passive scaling of loop filter. - Zhiqiang Huang; Howard Cam Luong; Baoyong Chi; Zhihua Wang 001; Haikun Jia (ISSCC, 2015)

A 60-dB DR PGA with DC-offset calibration for short-distance wireless receiver. - Xiaokun Zhao; Zheng Song 002; Baoyong Chi (VLSI-DAT, 2015)

A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS. - Xiaobao Yu; Meng Wei 001; Yun Yin; Ying Song; Siyang Han; Qiongbing Liu; Zongming Jin; Xiliang Liu; Zhihua Wang 001; Yichuang Sun; Baoyong Chi (IEEE J. Solid State Circuits, 2015)

An LP/CBP reconfigurable analog baseband circuit for software-defined radio receivers in 65 nm CMOS. - Xinwang Zhang; Bingqiao Liu; Zhihua Wang 001; Baoyong Chi (Microelectron. J., 2015)

A 60-GHz CMOS Dual-Mode Power Amplifier With Efficiency Enhancement at Low Output Power. - Lixue Kuang; Baoyong Chi; Haikun Jia; Wen Jia; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

A 0.1-1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA. - Xinwang Zhang; Baoyong Chi; Zhihua Wang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A 0.1-6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS. - Yun Yin; Baoyong Chi; Zhigang Sun; Xinwang Zhang; Zhihua Wang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators. - Haikun Jia; Clarissa C. Prawoto; Baoyong Chi; Zhihua Wang 001; C. Patrick Yue (A-SSCC, 2016)

A reconfigurable IF receiver supporting intra-band non-contiguous carrier aggregation in 65 nm CMOS. - Zipeng Chen; Zheng Song 002; Meng Wei 001; Zhihua Wang 001; Baoyong Chi (ISCAS, 2016)

A reconfigurable digital polar transmitter with open-loop phase modulation for Sub-GHz applications. - Peiyi Li 005; Zheng Song 002; Jianfu Lin; Meng Wei 001; Feng Guo; Wen Jia; Zhihua Wang 001; Baoyong Chi (ISIE, 2016)

Simple and robust self-healing technique for millimetre-wave amplifiers. - Haikun Jia; Baoyong Chi; Lixue Kuang; Zhihua Wang 001 (IET Circuits Devices Syst., 2016)

A 77 GHz Frequency Doubling Two-Path Phased-Array FMCW Transceiver for Automotive Radar. - Haikun Jia; Lixue Kuang; Wei Zhu; Zhiping Wang; Feng Ma; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2016)

A Novel Digital Closed Loop MEMS Accelerometer Utilizing a Charge Pump. - Yixing Chu; Jingxin Dong; Baoyong Chi; Yunfeng Liu (Sensors, 2016)

Guest Editorial for the Special Issue on Software-Defined Radio Transceivers and Circuits for 5G Wireless Communications. - Yichuang Sun; Baoyong Chi; Heng Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A PAPR-Aware Dual-Mode Subgigahertz CMOS Power Amplifier for Short-Range Wireless Communication. - Xiaobao Yu; Meng Wei 001; Ying Song; Zhihua Wang 001; Baoyong Chi (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A 5-/20-MHz BW Reconfigurable Quadrature Bandpass CT ΔΣ ADC With AntiPole-Splitting Opamp and Digital I/Q Calibration. - Yang Xu 005; Zehong Zhang; Baoyong Chi; Nan Qi; Hualin Cai; Zhihua Wang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A 77-GHz mixed-mode FMCW signal generator based on bang-bang phase detector. - Jianfu Lin; Zheng Song 002; Nan Qi; Woogeun Rhee; Baoyong Chi (A-SSCC, 2017)

A 5-bit phase-interpolator-based fractional-N frequency divider for digital phase-locked loops. - Jianfu Lin; Hanjun Jiang; Baoyong Chi (ISCAS, 2017)

An 80-83 GHz CMOS DCO based on DiCAD technique for size, linearity and noise optimization. - Zhiping Wang; Haikun Jia; Lixue Kuang; Baoyong Chi (Sci. China Inf. Sci., 2017)

A 6.6 mW 1.25-2.25 GHz low phase noise PLL frequency synthesizer based on wide tuning range Class-C VCO. - Jianfu Lin; Zheng Song 002; Meng Wei 001; Baoyong Chi (Microelectron. J., 2017)

A 0.1-5.0 GHz SDR transmitter with current-mode power-mixer and self-calibration scheme in 65 nm CMOS. - Yun Yin; Yanqiang Gao; Zhihua Wang 001; Baoyong Chi (Microelectron. J., 2017)

A Low-Power NB-IoT Transceiver With Digital-Polar Transmitter in 180-nm CMOS. - Zheng Song 002; Xiliang Liu; Xiaokun Zhao; Qiongbing Liu; Zongming Jin; Baoyong Chi (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A Flexible Continuous-Time Δ Σ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures. - Yang Xu 005; Xinwang Zhang; Zhihua Wang 001; Baoyong Chi (IEEE Trans. Very Large Scale Integr. Syst., 2017)

An Interference-Robust Reconfigurable Receiver With Automatic Frequency-Calibrated LNA in 65-nm CMOS. - Xinwang Zhang; Zipeng Chen; Yanqiang Gao; Feng Ma; Jiachen Hao; Guodong Zhu; Baoyong Chi (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A CMOS 76-81 GHz 2TX 3RX FMCW Radar Transceiver Based on Mixed-Mode PLL Chirp Generator. - Taikun Ma; Zipeng Chen; Jianxi Wu; Wei Zheng; Shufu Wang; Nan Qi; Baoyong Chi (A-SSCC, 2018)

A 77-GHz Mixed-Mode FMCW Generator Based on a Vernier TDC with Dual Rising-Edge Fractional-Phase Detector. - Jianxi Wu; Zipeng Chen; Wei Zheng; Yibo Liu; Shufu Wang; Nan Qi; Baoyong Chi (A-SSCC, 2018)

A K-Band Fractional-N Frequency Synthesizer With a Low Phase Noise LC VCO in 90nm CMOS. - Zhenwu Wang; Sijia Jiang; Hanjun Jiang; Baoyong Chi (ISCAS, 2018)

A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector. - Jianfu Lin; Zheng Song 002; Nan Qi; Woogeun Rhee; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2018)

A 0.1-5.0 GHz flexible SDR receiver with digitally assisted calibration in 65 nm CMOS. - Xinwang Zhang; Zipeng Chen; Yanqiang Gao; Yang Xu 005; Bingqiao Liu; Qian Yu; Yichuang Sun; Zhihua Wang 001; Baoyong Chi (Microelectron. J., 2018)

A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS. - Haikun Jia; Clarissa C. Prawoto; Baoyong Chi; Zhihua Wang 001; C. Patrick Yue (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Fully Integrated 27.5-30.5 GHz 8-Element Phased-Array Transmit Front-end Module in 65 nm CMOS. - An'an Li; Yingtao Ding; Zipeng Chen; Wei Wang; Sijia Jiang; Shiyan Sun; Zhiming Chen 001; Baoyong Chi (A-SSCC, 2019)

Transformer-Based Ultra-Wide Band 43 GHz VCO in 28 nm CMOS for FMCW Radar System. - Zhiyuan Chen; Guopei Chen; Zipeng Chen; Baoyong Chi; Guolin Li (ISCAS, 2019)

A Wideband High PSRR Capacitor-Less LDO with Adaptive DC Level Shift and Bulk-Driven Feed-Forward Techniques in 28nm CMOS. - Wei Wang; Baoyong Chi (ISCAS, 2019)

International Solid-State Circuits Conference 2019 aims at "envisioning the future". - Haikun Jia; Baoyong Chi (Sci. China Inf. Sci., 2019)

A 190 GHz VCO with Transformer-Based Push-Push Frequency Doubler in 40 nm CMOS. - Yibo Liu; Luhong Mao; Sheng Xie; Baoyong Chi (Circuits Syst. Signal Process., 2019)

A 25-35 GHz 5-bit digital attenuator with low RMS amplitude error and low phase variation in 65 nm CMOS. - An'an Li; Yingtao Ding; Zhiming Chen 001; Baoyong Chi (IEICE Electron. Express, 2019)

1.15 GHz image rejection filter with 45 dB image rejection ratio and 8.4 mW DC power in 90 nm CMOS. - An'an Li; Yingtao Ding; Zhiming Chen 001; Baoyong Chi (Microelectron. J., 2019)

A G-Band Wideband Bidirectional Transceiver Front-End in 40-nm CMOS. - Yibo Liu; Taikun Ma; Pingda Guan; Luhong Mao; Baoyong Chi (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A Fully Integrated 150-GHz Transceiver Front-End in 65-nm CMOS. - Xiangyu Meng 003; Baoyong Chi; Yibo Liu; Taikun Ma; Zhihua Wang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A Highly-Integrated Ka-Band Direct Up-Conversion Transmitter for Satellite Communication in 65nm CMOS. - Jinyu Zhu; Shiyan Sun; Baoyong Chi; Guangnan Zou; Yanfeng Wang (ICCT, 2020)

A 44-52 GHz Reflection-type Phase Shifter with 1.4° Phase Resolution in 28nm CMOS Process. - Shengnan Dong; Zipeng Chen; Haikun Jia; Wei Deng 001; Baoyong Chi (ICTA, 2020)

A 53.1-to-64.5 GHz In-Phase Coupled Quadrature Injection-Locked Oscillator with Transformer-Based I/Q-Phase Differential Injection Scheme. - Chenggang Li; Rui Wu 001; Haikun Jia; Wei Deng 001; Baoyong Chi (ICTA, 2020)

A 35-GHz TX and RX CMOS Front-Ends for Ka-Band FMCW Phased-Array Radar Transceivers. - Wei Deng 001; Rui Wu 001; Zhijie Chen; Manlai Ding; Baoyong Chi (ISCAS, 2020)

A FoM of -191 dB, 4.4-GHz LC-VCO Integrating an 8-Shaped Inductor with an Orthogonal-Coupled Tail-Filtering Inductor. - Yaqian Sun; Wei Deng 001; Baoyong Chi (ISCAS, 2020)

A Fully Integrated K-Band Dual Down-Conversion Receiver for Radar Applications in 90 nm CMOS. - An'an Li; Min Lin 002; Baoyong Chi; Yingtao Ding; Zheng Song 002; Zipeng Chen; Shiyan Sun; Yutian Li; Yinghang Wu; Zhenwu Wang; Zhiming Chen 001 (IEEE Access, 2020)

An Energy-Efficient 10-Gb/s CMOS Millimeter-Wave Transceiver With Direct-Modulation Digital Transmitter and I/Q Phase-Coupled Frequency Synthesizer. - Wei Deng 001; Zheng Song 002; Ruichang Ma; Jianfu Lin; Yutian Li; Jialiang Ye; Shangcheng Kong; Sanming Hu; Haikun Jia; Baoyong Chi (IEEE J. Solid State Circuits, 2020)

A CMOS 76-81-GHz 2-TX 3-RX FMCW Radar Transceiver Based on Mixed-Mode PLL Chirp Generator. - Taikun Ma; Wei Deng 001; Zipeng Chen; Jianxi Wu; Wei Zheng; Shufu Wang; Nan Qi; Yibo Liu; Baoyong Chi (IEEE J. Solid State Circuits, 2020)

A 27-31 ​GHz 6-bit phase shifter with low phase error/gain variation in 65 ​nm CMOS. - Zipeng Chen; An'an Li; Haikun Jia; Baoyong Chi (Microelectron. J., 2020)

A U-Band PLL Using Implicit Distributed Resonators for Sub-THz Wireless Transceivers in 40 nm CMOS. - Zipeng Chen; Wei Deng 001; Haikun Jia; Yibo Liu; Jianxi Wu; Pingda Guan; Jinyu Zhu; Luhong Mao; Zhihua Wang 001; Baoyong Chi (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A 28-GHz 16-Gb/s High Efficiency 16-QAM Transmitter in 65-nm CMOS. - Xiangyu Meng 003; Milad Kalantari; Baoyong Chi; Wenhua Chen 002; Zhijian Chen; Xiaoling Lin; C. Patrick Yue (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A 77-GHz Mixed-Mode FMCW Generator Based on a Vernier TDC With Dual Rising-Edge Fractional-Phase Detector. - Jianxi Wu; Wei Deng 001; Zipeng Chen; Wei Zheng; Yibo Liu; Shufu Wang; Nan Qi; Baoyong Chi (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A 35-GHz TX and RX Front End With High TX Output Power for Ka-Band FMCW Phased-Array Radar Transceivers in CMOS Technology. - Wei Deng 001; Rui Wu 001; Zhijie Chen; Manlai Ding; Haikun Jia; Baoyong Chi (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A Highly Integrated Energy-efficient CMOS Millimeter-wave Transceiver with Direct-modulation Digital Transmitter, Quadrature Phased-coupled Frequency Synthesizer and Substrate-Integrated Waveguide E-shaped Patch Antenna. - Wei Deng 001; Zheng Song 002; Ruichang Ma; Haikun Jia; Baoyong Chi (ASP-DAC, 2021)

A 33.5-37.5 GHz 4-Element Phased-Array Transceiver Front-End with High-Accuracy Low-Variation 6-bit Resolution 360° Phase Shift and 0 31.5 dB Gain Control in 65 nm CMOS. - Pingda Guan; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2021)

A 24-30GHz 4-Element Phased Array Transceiver with Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter in 65 nm CMOS Technology. - Xiangrong Huang; Haikun Jia; Shengnan Dong; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2021)

An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator. - Wei Deng 001; Haikun Jia; Rui Wu 001; Shiyan Sun; Chenggang Li; Zhihua Wang 001; Baoyong Chi (CICC, 2021)

An Ultra-Compact 16-to-45 GHz Power Amplifier within A Single Inductor Footprint Using Folded Transformer Technique. - Pingda Guan; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (CICC, 2021)

Optimization methods for high inductance-density inductors for high speed integrated circuits. - Ziyue Dang; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (ICTA, 2021)

A C-band FMCW Radar Transmitter with a 22 dBm Output Power Series-stacking CMCD PA for Long-distance Detection in 180-nm CMOS Technology. - Xiangrong Huang; Wei Deng 001; Haikun Jia; Yuhui Wei; Zhihua Wang 001; Baoyong Chi (ICTA, 2021)

A 60GHz 186.5dBc/Hz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS. - Haikun Jia; Wei Deng 001; Pingda Guan; Zhihua Wang 001; Baoyong Chi (ISSCC, 2021)

A 11.1-to-14.2 GHz Self-adapted Two-point Modulation Dual-path Type-II Digital PLL Concurrently Achieving 124.7-MHz/μs Chirp Rate and 2.27-GHz Bandwidth. - Wei Deng 001; Zipeng Chen; Haikun Jia; Shiyan Sun; Guopei Chen; Zhihua Wang 001; Baoyong Chi (VLSI Circuits, 2021)

A 122-168GHz Radar/Communication Fusion-Mode Transceiver with 30GHz Chirp Bandwidth, 13dBm Psat, and 8.3dBm OP1dB in 28nm CMOS. - Zipeng Chen; Wei Deng 001; Haikun Jia; Pingda Guan; Taikun Ma; Shiyan Sun; Xiangrong Huang; Guopei Chen; Ruichang Ma; Shengnan Dong; Luqiang Duan; Zhihua Wang 001; et al. (VLSI Circuits, 2021)

A 77 GHz FMCW MIMO radar system based on 65nm CMOS cascadable 2T3R transceiver. - Taikun Ma; Zipeng Chen; Jianxi Wu; Wei Zheng; Shufu Wang; Nan Qi; Min Lin 002; Baoyong Chi (Sci. China Inf. Sci., 2021)

A 76-81 GHz FMCW 2TX/3RX Radar Transceiver with Integrated Mixed-Mode PLL and Series-Fed Patch Antenna Array. - Taikun Ma; Wei Deng 001; Haikun Jia; Yejun He; Baoyong Chi (ASP-DAC, 2022)

A 12.5-to-15.4GHz, -118.9dBc/Hz PN at 1MHz offset, and 191.0dBc/Hz FoM VCO with Common-Mode Resonance Expansion and Simultaneous Differential 2ND-Harmonic Output using a Single Three-Coil Transformer in 65nm CMOS. - Ruichang Ma; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (CICC, 2022)

A 4.7GHz Synchronized-Multi-Reference PLL with In-Band Phase Noise Lower than Reference Phase Noise +20logNdiv. - Hongzhuo Liu; Wei Deng 001; Haikun Jia; Shiyan Sun; Qixiu Wu; Jiajie Tang; Zhihua Wang 001; Baoyong Chi (ESSCIRC, 2022)

A 22.8 GHz to 32.8 GHz Compact Power Amplifier with a 15 dBm Output P1dB and 36.5% Peak PAE in 65-nm CMOS. - Huabing Liao; Haikun Jia; Xiangrong Huang; Bao Shi; Wei Deng 001; Baoyong Chi; Zhihua Wang 001 (ICTA, 2022)

A Highly Linearized Ka-band Heterodyne Receiver using a Folded Class-AB Inductive Peaking Mixer and Magnetic-Self-Cancellation-Transformer-Based IF Amplifiers. - Qixiu Wu; Wei Deng 001; Haikun Jia; Rui Wu 001; Fuyuan Zhao; Baoyong Chi (ISCAS, 2022)

A 53.6-to-60.2GHz Many-Core Fundamental Oscillator With Scalable Mesh Topology Achieving -136.0dBc/Hz Phase Noise at 10MHz Offset and 190.3dBc/Hz Peak FoM in 65nm CMOS. - Haikun Jia; Ruichang Ma; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (ISSCC, 2022)

A Ka-band calibratable phased-array front-end chip with high element-consistency. - Shiyan Sun; An'an Li; Yingtao Ding; Zipeng Chen; Wei Wang; Sijia Jiang; Zhiming Chen 001; Baoyong Chi (Sci. China Inf. Sci., 2022)

A Self-Adapted Two-Point Modulation Type-II Digital PLL for Fast Chirp Rate and Wide Chirp-Bandwidth FMCW Signal Generation. - Wei Deng 001; Zipeng Chen; Haikun Jia; Angxiao Yan; Shiyan Sun; Guopei Chen; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2022)

A 4.4-GHz 193.2-dB FoM 8-Shaped-Inductor Based LC-VCO Using Orthogonal-Coupled Triple-Coil Transformer. - Yaqian Sun; Wei Deng 001; Haikun Jia; Zhihua Wang 001; Baoyong Chi (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A Fully Integrated Bit-to-Bit 24/48Gb/s QPSK/16-QAM D-Band Transceiver with Mixed-Signal Baseband in 28nm CMOS Technology. - Pingda Guan; Haikun Jia; Wei Deng 001; Ruichang Ma; Mingxing Deng; Jiamin Xue; Angxiao Yan; Shiyan Sun; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2023)

A Compact E-Band Load-Modulation Balanced Power Amplifier Using Coupled Transmission-Line Output Network Achieving 22.1-dBm Psat and 34.9%/12.2% Efficiency at Psat/6-dB PBO. - Xiangrong Huang; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2023)

A 4-Element 4-Beam Ka-Band Phased-Array Receiver Using Mesh Topology in 65 nm CMOS. - Xiangrong Huang; Haikun Jia; Wei Deng 001; Chuanming Zhu; Zhihua Wang 001; Xuzhi Liu; Zhiming Chen 001; Baoyong Chi (A-SSCC, 2023)

A 27-to-31.6 GHz 8-Element Phased-Array Transmitter Front-End with Inter-Element-Interference Cancellation Scheme in 65 nm CMOS. - Dongze Li; Wei Deng 001; Xintao Li; Ruiheng Qiu; Haikun Jia; Xiangrong Huang; Ziyuan Guo; Baoyong Chi (A-SSCC, 2023)

A 26.9-GHz 4-Element Code-Domain Hybrid Beamforming Phased-Array Receiver. - Ziyi Lin; Haikun Jia; Chuanming Zhu; Wei Deng 001; Huabing Liao; Bao Shi; Lujie Hao; Xiangrong Huang; Baoyong Chi (A-SSCC, 2023)

IEEE ASSCC 2023/ Session 10/ Paper 10.5. - Ruichang Ma; Haikun Jia; Hongzhuo Liu; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (A-SSCC, 2023)

A Transient Enhancement Digital LDO with Adaptive Ripple Cancelation Based on Optimal Compensation Period Approximation. - Angxiao Yan; Wei Deng 001; Haikun Jia; Shiwei Zhang; Baoyong Chi (A-SSCC, 2023)

A 25.0-to-35.9GHz Dual-Layer Quad-Core Dual-Mode VCO with 189.1dBc/Hz FoM and 200.2dBc/Hz FoMT at 1MHz Offset in 65nm CMOS. - Pingda Guan; Haikun Jia; Wei Deng 001; Ruichang Ma; Huabing Liao; Zhihua Wang 001; Baoyong Chi (CICC, 2023)

A 100 MHz-Reference, 10.3-to-11.1 GHz Quadrature PLL with 33.7-fsrms Jitter and -83.9 dBc Reference Spur Level using a -130.8 dBc/Hz Phase Noise at 1MHz offset Folded Series-Resonance VCO in 65nm CMOS. - Shiwei Zhang; Wei Deng 001; Haikun Jia; Hongzhuo Liu; Shiyan Sun; Pingda Guan; Baoyong Chi (CICC, 2023)

Transceiver SoC for Wireless Indoor Sensing Data-fusion. - Bufan Zhu; Wei Deng 001; Ziying Huang; Haikun Jia; Haiyang Jia; Angxiao Yan; Yumeng Yang; Junfeng Liu; Yu Fu; Shiyan Sun; Chao Tang; Taikun Ma; et al. (CICC, 2023)

A 37-to-41.8 GHz Double-Gm-Boosting LNA with 2.9-dB NFmin Using Quadruple-Coupling Transformer for Phased-Array Transceivers. - Dongze Li; Wei Deng 001; Haikun Jia; Ruiheng Qiu; Xintao Li; Ziyuan Guo; Baoyong Chi (ESSCIRC, 2023)

A 4.8-GHz Time-Interleaved Multi-Reference PLL with 16.1-fs Jitter. - Hongzhuo Liu; Wei Deng 001; Haikun Jia; Shiwei Zhang; Shiyan Sun; Baoyong Chi (ESSCIRC, 2023)

INVITED PAPER: A 312.5Mbps-32Gbps JESD204C Wireline Transceiver Back-Compatible with JESD204B in 28nm CMOS. - Shijie Li; Ruichang Ma; Mingxing Deng; Jiamin Xue; Wei Deng 001; Baoyong Chi; Haikun Jia (ICTA, 2023)

A 6.5-to-8GHz IEEE 802.15.4z-compliant All-Digital UWB Transmitter with Integrated Fast-Settling Master-Slave Regulator. - Ziying Huang; Wei Deng 001; Haikun Jia; Bufan Zhu; Angxiao Yan; Baoyong Chi (ISCAS, 2023)

An 11.5-to-14.3GHz 192.8dBc/Hz FoM at 1MHz Offset Dual-Core Enhanced Class-F VCO with Common-Mode-Noise Self-Cancellation and Isolation Technique. - Qixiu Wu; Wei Deng 001; Haikun Jia; Hongzhuo Liu; Shiwei Zhang; Zhihua Wang 001; Baoyong Chi (ISSCC, 2023)

A 10-to-300MHz Fractional Output Divider with -80dBc Worst-Case Fractional Spurs Using Auxiliary-PLL-Based Background 0th/1st/2nd-Order DTC INL Calibration. - Yumeng Yang; Wei Deng 001; Angxiao Yan; Haikun Jia; Junlong Gong; Zhihua Wang 001; Baoyong Chi (ISSCC, 2023)

An 11.4-to-16.4GHz FMCW Digital PLL with Cycle-slipping Compensation and Back-tracking DPD Achieving 0.034% RMS Frequency Error under 3.4-GHz Chirp Bandwidth and 960-MHz/μs Chirp Slope. - Angxiao Yan; Wei Deng 001; Haikun Jia; Shiyan Sun; Chao Tang; Bufan Zhu; Yu Fu; Hongzhuo Liu; Baoyong Chi (VLSI Technology and Circuits, 2023)

A D-Band Joint Radar-Communication CMOS Transceiver. - Wei Deng 001; Zipeng Chen; Haikun Jia; Pingda Guan; Taikun Ma; Angxiao Yan; Shiyan Sun; Xiangrong Huang; Guopei Chen; Ruichang Ma; Shengnan Dong; Luqiang Duan; et al. (IEEE J. Solid State Circuits, 2023)

A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS. - Haikun Jia; Pingda Guan; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2023)

A Compact and Low Phase Noise Square-Geometry Quad-Core Class-F VCO Using Parallel Inductor-Sharing Technique. - Yaqian Sun; Wei Deng 001; Haikun Jia; Yejun He; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2023)

A 24-30-GHz Four-Element Phased Array Transceiver With Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter for 5G Communication. - Xiangrong Huang; Haikun Jia; Shengnan Dong; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A Fully-Connected Time-Modulated Phased-Array Transmitter Featuring Physical Security Directional Link and Multi-Beam PAPR Reduction. - Xiangrong Huang; Haikun Jia; Wei Deng 001; Chuanming Zhu; Ruiyang Jiang; Xintao Li; Zhihua Wang; Baoyong Chi (A-SSCC, 2024)

A 130-to-170 GHz Reconfigurable Heterodyne/Homodyne Transceiver Achieving 20.5-dBm Psat for Emerging Integrated Wireless Access and Backhaul Networks. - Qixiu Wu; Wei Deng 001; Ziyuan Guo; Haikun Jia; Taikun Ma; Qiuyu Peng; Chang Liu; Baoyong Chi (A-SSCC, 2024)

A 3-to-40 GHz 64QAM/256QAM/4096QAM Zero-IF CMOS Transceiver Chipset for Millimeter-wave Software-defined Radios. - Wenjing Ye; Wei Deng 001; Haikun Jia; Jingling Zhang; Linjun Gu; Fuyuan Zhao; Ruichen Wan; Baoyong Chi (A-SSCC, 2024)

A 48MHz Temperature Compensated Crystal Oscillator Utilizing Time-Domain Accuracy Boosting Techniques Achieving ±1.4ppm Frequency Stability from -55°C to 115°C. - Junyang Yin; Wei Deng 001; Haikun Jia; Minshuo Wang; Baoyong Chi (A-SSCC, 2024)

A 194.9dBc/Hz FoM and 6.8-to-11.6GHz Quad-Core Dual-Mode Class-F VCO Featuring Wideband Flicker Noise Suppression. - Huanyu Ge; Haikun Jia; Wei Deng 001; Ruichang Ma; Baoyong Chi (CICC, 2024)

An 11.1-to-14.9GHz Digital-Integral Hybrid-Proportional Fractional-N PLL with an LC DTC Achieving 0.52μs Locking Time and 41.3f5 Jitter. - Hongzhuo Liu; Wei Deng 001; Haikun Jia; Baoyong Chi (CICC, 2024)

INVITED PAPER: A 21.5-to-37 GHz Series Doherty CMOS Power Amplifier with Distributed Multi-step Impedance Inverting Network Achieving 28.2%/23.2%/13.2% Peak/OP1dB/6dBPBO PAEs. - Xinyu Jiang; Wei Deng 001; Junlong Gong; Haikun Jia; Baoyong Chi (ICTA, 2024)

A 24.3-to-44.8 GHz Reconfigurable Dual-Band T/R Front-End with An Implicit Switch-based Antenna Interface Supporting 600MSym/s 64QAM. - Junlong Gong; Wei Deng 001; Fuyuan Zhao; Haikun Jia; Wenjing Ye; Ruichen Wan; Baoyong Chi (ISCAS, 2024)

19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique. - Huanyu Ge; Haikun Jia; Wei Deng 001; Ruichang Ma; Zhihua Wang 001; Baoyong Chi (ISSCC, 2024)

22.4 A 4.8GS/s 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing-Skew Calibration and Bit-Distribution-Based Background Ping-Pong Comparator Offset Calibration. - Yunsong Tao; Mingyang Gu; Baoyong Chi; Yi Zhong; Lu Jie 001; Nan Sun 001 (ISSCC, 2024)

A 132-to-163 GHz 4TX/4RX Distributed MIMO FMCW Radar Transceiver with Real-Time Reference-Clock Synchronization Enabling Cooperative Coherent Multistatic Imaging System. - Ruichen Wan; Wei Deng 001; Qixiu Wu; Haikun Jia; W. Rui; Angxiao Yan; Haowen Cai; Sanming Hu; Zhihua Wang 001; Baoyong Chi (VLSI Technology and Circuits, 2024)

A Low-Phase-Noise VCO With Common-Mode Resonance Expansion and Intrinsic Differential 2nd-Harmonic Output Based on a Single Three-Coil Transformer. - Ziyi Lin; Haikun Jia; Ruichang Ma; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2024)

A Band-Shifting Millimeter-Wave T/R Front-End Using Inductance-Mutation Transformer Technique for Multiband Phased-Array Transceivers. - Fuyuan Zhao; Wei Deng 001; Haikun Jia; Wenjing Ye; Ruichen Wan; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2024)

Correction to "A 4.4-GHz 193.2-dB FoM 8-Shaped-Inductor-Based LC-VCO Using Orthogonal-Coupled Triple-Coil Transformer". - Yaqian Sun; Wei Deng 001; Haikun Jia; Zhihua Wang 001; Baoyong Chi (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Multireference PLL: Theory and Implementation. - Hongzhuo Liu; Wei Deng 001; Haikun Jia; Shiwei Zhang; Shiyan Sun; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2024)

An Enhanced Class-F Dual-Core VCO With Common-Mode-Noise Self-Cancellation and Isolation Technique. - Qixiu Wu; Wei Deng 001; Yaqian Sun; Haikun Jia; Hongzhuo Liu; Shiwei Zhang; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2024)

28 GHz Compact LNAs With 1.9 dB Minimum NF Using Folded Three-Coil Transformer and Dual-Feedforward Techniques for Phased Array Systems. - Xiangrong Huang; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi; Ziqiang Wang (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A Fully Integrated QPSK/16-QAM D-Band CMOS Transceiver With Mixed-Signal Baseband Circuitry Realizing Digital Interfaces. - Pingda Guan; Ruichang Ma; Haikun Jia; Wei Deng 001; Mingxing Deng; Jiamin Xue; Angxiao Yan; Shiyan Sun; Qiuyu Peng; Teerachot Siriburanon; Robert Bogdan Staszewski; Zhihua Wang 001; et al. (IEEE J. Solid State Circuits, 2024)

A Compact E-Band Load-Modulation Balanced Power Amplifier in 65-nm CMOS. - Xiangrong Huang; Haikun Jia; Wei Deng 001; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2024)

A 3.3-V Ku-Band Front-End Module With 2.6-dB NF and 18.9-dBm OP1dB in 65-nm CMOS. - Ting Huang; Xiangyu Meng 003; Gaoyuan Zhao; Baoyong Chi (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 22.0-to-28.4GHz 192.2dBc/Hz FoM and 206.2dBc/Hz FoMA Dual-Core VCO Using Circular-Inverse-Class-F Topology Under Standard Supply Voltage in 65nm CMOS Process. - Huanyu Ge; Haikun Jia; Wei Deng 001; Baoyong Chi (CICC, 2025)

A 22-to-32 GHz 4-Beam 32-Element Polarization Reconfigurable Fully-Connected Fully-Bidirectional MIMO Transceiver for Emerging Space-Air-Ground-Sea Integrated Network. - Junlong Gong; Wei Deng 001; Shulin Yao; Haikun Jia; Xinyu Jiang; Xiangyu Nie; Dongfang Li; Hongliang Wu; Chuanming Zhu; Xiangrong Huang; Baoyong Chi (CICC, 2025)

A 104-to-132 GHz 16-way Power Amplifier Using Enhanced Magnetic Coupling Cavity Achieving 21.2 dBm Output Power in 28nm Bulk CMOS. - Ziyuan Guo; Wei Deng 001; Weiqi Zheng; Haikun Jia; Hongliang Wu; Qiuyu Peng; Fuyuan Zhao; Junyang Yin; Dongze Li; Baoyong Chi (CICC, 2025)

A 0.18-µs-Locking-Time Fractional-N PLL with Stochastic Gradient Descent Tuning Curve Fitting, Initial Phase Error Zeroing, and Random DSM Achieving 44.4-fs Jitter at Near-Integer Channel. - Hongzhuo Liu; Wei Deng 001; Haikun Jia; Baoyong Chi (CICC, 2025)

A 112Gb/s Analog-MUX-based PAM-4 Transmitter with Inherent 2-tap FFE in 65nm CMOS. - Ziyi Lin; Haikun Jia; Shitu He; Wei Deng 001; Chang Liu; Ruiheng Qiu; Chen Wang; Baoyong Chi (ISCAS, 2025)

A Total Noise Power Based Digital Calibration Method for Continuous-Time Delta-Sigma Modulators. - Zhuojian Yao; Haikun Jia; Lilan Yu; Junfeng Liu; Yu Fu; Wei Deng 001; Baoyong Chi (ISCAS, 2025)

19.9 An 11-to-16.4GHz, 3.4GHz/µs-Slope, 5.32GHz-Chirp-Bandwidth, 0.043%-RMS-Frequency-Error FMCW Digital PLL with Posterior-Segment DPD Featuring 5-Chirp-Cycle Convergence Time. - Angxiao Yan; Wei Deng 001; Haikun Jia; Yumeng Yang; Chao Tang; Shiyan Sun; Zhihua Wang 001; Baoyong Chi (ISSCC, 2025)

A Transformer-Based Series-Resonance CMOS VCO. - Shiwei Zhang; Wei Deng 001; Haikun Jia; Hongzhuo Liu; Shiyan Sun; Pingda Guan; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2025)

An Ultra-Low-Jitter Fast-Hopping Fractional-N PLL With LC DTC and Hybrid-Proportional Paths. - Hongzhuo Liu; Wei Deng 001; Haikun Jia; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2025)

A Digital-Intensive 1TX/2RX IEEE 802.15.4/4z-Compliant Joint-Radar-Communication-Location Transceiver SoC. - Bufan Zhu; Wei Deng 001; Ziying Huang; Haikun Jia; Haiyang Jia; Angxiao Yan; Yumeng Yang; Junfeng Liu; Yu Fu; Shiyan Sun; Chao Tang; Lixue Kuang; et al. (IEEE J. Solid State Circuits, 2025)

A Multi-Core Series-Resonance CMOS Oscillator. - Shiwei Zhang; Wei Deng 001; Haikun Jia; Zhihua Wang 001; Baoyong Chi (IEEE J. Solid State Circuits, 2025)

A 26-Gb/s 140-GHz OOK CMOS Transmitter and Receiver Chipset for High-Speed Wireless and Dielectric Waveguide Communication. - Qiuyu Peng; Haikun Jia; Ran Fang; Pingda Guan; Mingxing Deng; Jiamin Xue; Wei Deng 001; Xin Liang; Baoyong Chi (IEEE J. Solid State Circuits, 2025)

A Sample-and-Hold-Based 453-ps True Time Delay Circuit With a Wide Bandwidth of 0.5-2.5 GHz in 65-nm CMOS. - Chuanjie Chen; Xiangyu Meng 003; Wang Xie; Baoyong Chi (IEEE Trans. Very Large Scale Integr. Syst., 2025)