Hardware Design and Implementation of Post-Quantum Cryptography Kyber. - Qingru Zeng; Quanxin Li; Baoze Zhao; Han Jiao 003; Yihua Huang 005 (HPEC, 2022)

A Novel Hardware Accelerator of NeRF Based on Xilinx UltraScale and UltraScale+ FPGA. - Baoze Zhao; Wenjin Huang; Yihua Huang 005 (FPL, 2023)

BSTMSM: A High-Performance FPGA-based Multi-Scalar Multiplication Hardware Accelerator. - Baoze Zhao; Wenjin Huang; Tianrui Li 005; Yihua Huang 005 (ICFPT, 2023)