A Faster Hierarchical Balanced Bipartitioner for VLSI Floorplans Using Monotone Staircase Cuts. - Bapi Kar; Susmita Sur-Kolay; Sridhar H. Rangarajan; Chittaranjan A. Mandal (VDAT, 2012)

STAIRoute: Global routing using monotone staircase channels. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (ISVLSI, 2013)

A novel architecture for QPSK modulation based on time-mode signal processing. - Sumit Saha; Bapi Kar; Susmita Sur-Kolay (VDAT, 2014)

Global Routing Using Monotone Staircases with Minimal Bends. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (VLSID, 2014)

A New Method for Defining Monotone Staircases in VLSI Floorplans. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (ISVLSI, 2015)

An early global routing framework for uniform wire distribution in SoCs. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (SoCC, 2016)

A Novel EPE Aware Hybrid Global Route Planner after Floorplanning. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (VLSID, 2016)

A Stacked Autoencoder Neural Network based Automated Feature Extraction Method for Anomaly detection in On-line Condition Monitoring. - Mohendra Roy; Sumon Kumar Bose; Bapi Kar; Pradeep Kumar Gopalakrishnan; Arindam Basu (SSCI, 2018)

STAIRoute: Early Global Routing using Monotone Staircases for Congestion Reduction. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (CoRR, 2018)

Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (CoRR, 2018)

Exploring the Scope of Unconstrained Via Minimization by Recursive Floorplan Bipartitioning. - Bapi Kar; Susmita Sur-Kolay; Chittaranjan A. Mandal (CoRR, 2018)

ADEPOS: anomaly detection based power saving for predictive maintenance using edge computing. - Sumon Kumar Bose; Bapi Kar; Mohendra Roy; Pradeep Kumar Gopalakrishnan; Arindam Basu (ASP-DAC, 2019)

Live Demonstration: Autoencoder-Based Predictive Maintenance for IoT. - Pradeep Kumar Gopalakrishnan; Bapi Kar; Sumon Kumar Bose; Mohendra Roy; Arindam Basu (ISCAS, 2019)

ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65nm CMOS. - Sumon Kumar Bose; Bapi Kar; Mohendra Roy; Pradeep Kumar Gopalakrishnan; Lei Zhang; Aakash Patil; Arindam Basu (CoRR, 2019)

ADIC: Anomaly Detection Integrated Circuit in 65nm CMOS utilizing Approximate Computing. - Bapi Kar; Pradeep Kumar Gopalakrishnan; Sumon Kumar Bose; Mohendra Roy; Arindam Basu (CoRR, 2020)

ADEPOS: A Novel Approximate Computing Framework for Anomaly Detection Systems and its Implementation in 65-nm CMOS. - Sumon Kumar Bose; Bapi Kar; Mohendra Roy; Pradeep Kumar Gopalakrishnan; Lei Zhang; Aakash Patil; Arindam Basu (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

ADIC: Anomaly Detection Integrated Circuit in 65-nm CMOS Utilizing Approximate Computing. - Bapi Kar; Pradeep Kumar Gopalakrishnan; Sumon Kumar Bose; Mohendra Roy; Arindam Basu (IEEE Trans. Very Large Scale Integr. Syst., 2020)