Microprocessor synthesis. - Vijay K. Raj; Barry M. Pangrle; Daniel D. Gajski (DAC, 1984)

Design Tools for Intelligent Silicon Compilation. - Barry M. Pangrle; Daniel D. Gajski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

SCHALLOC: an algorithm for simultaneous scheduling & connectivity binding in a datapath synthesis system. - Neerav Berry; Barry M. Pangrle (EURO-DAC, 1990)

Interconnection synthesis with geometric constraints. - Forrest Brewer; Barry M. Pangrle; Andrew Seawright (MICRO, 1990)

An integrated, multi-level synthesis system. - Barry M. Pangrle; Pao-Po Hou; Robert Michael Owens; Mary Jane Irwin (RSP, 1990)

Redundant Operator Creation: A Scheduling Optimization Technique. - Donald A. Lobo; Barry M. Pangrle (DAC, 1991)

Relevant Issues in High-Level Connectivity Synthesis. - Barry M. Pangrle; Forrest Brewer; Donald A. Lobo; Andrew Seawright (DAC, 1991)

On the complexity of connectivity binding. - Barry M. Pangrle (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Superpipelined Control and Data Path Synthesis. - Usha Prabhu; Barry M. Pangrle (DAC, 1992)

Generating pipelined datapaths using reduction techniques to shorten critical paths. - Donald A. Lobo; Barry M. Pangrle (EURO-DAC, 1992)

Optimization Techniques for Pipelined Scheduling. - Donald A. Lobo; Barry M. Pangrle (VLSI Design, 1992)

Conditional and unconditional hardware sharing in pipeline synthesis. - Usha Prabhu; Barry M. Pangrle (EURO-DAC, 1993)

A grid-based approach for connectivity binding with geometric costs. - Hyuk-Jae Jang; Barry M. Pangrle (ICCAD, 1993)

Global Mobility Based Scheduling. - Usha Prabhu; Barry M. Pangrle (ICCD, 1993)

GB: A New Grid-Based Binding Approach for High-Level Synthesis. - Hyuk-Jae Jang; Barry M. Pangrle (VLSI Design, 1993)

A system for compiling and debugging structured data processing controllers. - Andrew Seawright; Joseph Buck; Ulrich Holtmann; Wolfgang Meyer 002; Barry M. Pangrle; Rob Verbrugghe (EURO-DAC, 1996)

RTL c-based methodology for designing and verifying a multi-threaded processor. - Luc Séméria; Renu Mehra; Barry M. Pangrle; Arjuna Ekanayake; Andrew Seawright; Daniel Ng (DAC, 2002)

Beyond UPF & CPF: Low-power design and verification. - Barry M. Pangrle; John Biggs; Cristophe Clavel; Olivier Domerego; Knut M. Just (DATE, 2011)

Industry focus session on low-power design. - Clive Bittlestone; Jim Kardach; Renu Mehra; David Flynn; Barry M. Pangrle (ISLPED, 2012)