Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. - Vojin G. Oklobdzija; Bart R. Zeydel; Hoang Q. Dao; Sanu Mathew; Ram Krishnamurthy 001 (IEEE Symposium on Computer Arithmetic, 2003)

Energy minimization method for optimal energy-delay extraction. - Hoang Q. Dao; Bart R. Zeydel; Vojin G. Oklobdzija (ESSCIRC, 2003)

Energy Optimization of High-Performance Circuits. - Hoang Q. Dao; Bart R. Zeydel; Vojin G. Oklobdzija (PATMOS, 2003)

Efficient Mapping of Addition Recurrence Algorithms in CMOS. - Bart R. Zeydel; Theo T. J. H. Kluter; Vojin G. Oklobdzija (IEEE Symposium on Computer Arithmetic, 2005)

Architectural Considerations for Energy Efficiency. - Hoang Q. Dao; Bart R. Zeydel; Vojin G. Oklobdzija (ICCD, 2005)

Low- and Ultra Low-Power Arithmetic Units: Design and Comparison. - Milena Vratonjic; Bart R. Zeydel; Vojin G. Oklobdzija (ICCD, 2005)

Comparison of high-performance VLSI adders in the energy-delay space. - Vojin G. Oklobdzija; Bart R. Zeydel; Hoang Q. Dao; Sanu Mathew; Ram Krishnamurthy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design. - Milena Vratonjic; Bart R. Zeydel; Vojin G. Oklobdzija (PATMOS, 2006)

Circuit Design Style for Energy Efficiency: LSDL and Compound Domino. - Xiao Yan Yu; Robert K. Montoye; Kevin J. Nowka; Bart R. Zeydel; Vojin G. Oklobdzija (PATMOS, 2006)

Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues and Design Limitations. - Bart R. Zeydel; Vojin G. Oklobdzija (PATMOS, 2006)

A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS. - Steven K. Hsu; Sanu K. Mathew; Mark A. Anders 001; Bart R. Zeydel; Vojin G. Oklobdzija; Ram K. Krishnamurthy; Shekhar Y. Borkar (IEEE J. Solid State Circuits, 2006)

Energy optimization of pipelined digital systems using circuit sizing and supply scaling. - Hoang Q. Dao; Bart R. Zeydel; Vojin G. Oklobdzija (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Logic Style Comparison for Ultra Low Power Operation in 65nm Technology. - Mandeep Singh; Christophe Giacomotto; Bart R. Zeydel; Vojin G. Oklobdzija (PATMOS, 2007)

Energy-Efficient Design Methodologies: High-Performance VLSI Adders. - Bart R. Zeydel; Dursun Baran; Vojin G. Oklobdzija (IEEE J. Solid State Circuits, 2010)