Synthesis of pipelined DSP accelerators with dynamic scheduling. - Patrick Schaumont; Bart Vanthournout; Ivo Bolsens; Hugo De Man (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. - Torsten Kempf; Malte Doerper; Rainer Leupers; Gerd Ascheid; Heinrich Meyr; Tim Kogel; Bart Vanthournout (DATE, 2005)

Task management in MPSoCs: An ASIP approach. - Jerónimo Castrillón; Diandian Zhang; Torsten Kempf; Bart Vanthournout; Rainer Leupers; Gerd Ascheid (ICCAD, 2009)

Optimized communication architecture of MPSoCs with a hardware scheduler: A system view. - Diandian Zhang; Han Zhang; Jerónimo Castrillón; Torsten Kempf; Gerd Ascheid; Rainer Leupers; Bart Vanthournout (SoC, 2010)

The MOSART Mapping Optimization for Multi-Core ARchiTectures. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI (Selected papers), 2010)

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI, 2010)

2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures. - Cristina Silvano; William Fornaciari; Stefano Crespi-Reghizzi; Giovanni Agosta; Gianluca Palermo; Vittorio Zaccaria; Patrick Bellasi; Fabrizio Castro; Simone Corbetta; Andrea Di Biagio; Ettore Speziale; Michele Tartara; et al. (ISVLSI (Selected papers), 2010)

2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures. - Cristina Silvano; William Fornaciari; Stefano Crespi-Reghizzi; Giovanni Agosta; Gianluca Palermo; Vittorio Zaccaria; Patrick Bellasi; Fabrizio Castro; Simone Corbetta; Andrea Di Biagio; Ettore Speziale; Michele Tartara; et al. (ISVLSI, 2010)

Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach. - Cristina Silvano; William Fornaciari; Stefano Crespi-Reghizzi; Giovanni Agosta; Gianluca Palermo; Vittorio Zaccaria; Patrick Bellasi; Fabrizio Castro; Simone Corbetta; Ettore Speziale; Diego Melpignano; J. M. Zins; et al. (ReCoSoC, 2011)

Optimized Communication Architecture of MPSoCs with a Hardware Scheduler: A System-Level Analysis. - Diandian Zhang; Han Zhang; Jerónimo Castrillón; Torsten Kempf; Bart Vanthournout; Gerd Ascheid; Rainer Leupers (Int. J. Embed. Real Time Commun. Syst., 2011)

Parallel paradigms and run-time management techniques for many-core architectures: the 2PARMA approach. - Cristina Silvano; William Fornaciari; Stefano Crespi-Reghizzi; Giovanni Agosta; Gianluca Palermo; Vittorio Zaccaria; Patrick Bellasi; Fabrizio Castro; Simone Corbetta; Ettore Speziale; Diego Melpignano; J. M. Zins; et al. (INA-OCMC@HiPEAC, 2012)

Application-aware spinlock control using a hardware scheduler in MPSoC platforms. - Diandian Zhang; Li Lu 005; Jerónimo Castrillón; Torsten Kempf; Gerd Ascheid; Rainer Leupers; Bart Vanthournout (ISSoC, 2012)

An Overview of Open SystemC Initiative Standards Development. - Trevor Wieman; Bishnupriya Bhattacharya; Tor E. Jeremiassen; Christian Schröder; Bart Vanthournout (IEEE Des. Test Comput., 2012)

Efficient Implementation of Application-Aware Spinlock Control in MPSoCs. - Diandian Zhang; Li Lu 005; Jerónimo Castrillón; Torsten Kempf; Gerd Ascheid; Rainer Leupers; Bart Vanthournout (Int. J. Embed. Real Time Commun. Syst., 2013)