On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor. - Bartomeu Alorda; Ivan de Paúl; Jaume Segura 001; T. Miller (IOLTW, 2000)

Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments. - Ivan de Paúl; M. Rosales; Bartomeu Alorda; Jaume Segura 001; Charles F. Hawkins; Jerry M. Soden (VTS, 2001)

An Off-Chip Sensor Circuit for On-Line Transient Current Testing. - Bartomeu Alorda; André Ivanov; Jaume Segura 001 (IOLTW, 2002)

Charge Based Transient Current Testing (CBT) for Submicron CMOS SRAMs. - Bartomeu Alorda; M. Rosales; Jerry M. Soden; Charles F. Hawkins; Jaume Segura 001 (ITC, 2002)

An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing. - Bartomeu Alorda; Jaume Segura 001 (IOLTS, 2003)

CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing. - Bartomeu Alorda; Brad Bloechel; Ali Keshavarzi; Jaume Segura 001 (ITC, 2003)

A BIST-based Charge Analysis for Embedded Memories. - Bartomeu Alorda; Vicent Canals; Ivan de Paúl; Jaume Segura 001 (IOLTS, 2004)

A Two-Level Power-Grid Model for Transient Current Testing Evaluation. - Bartomeu Alorda; Vincent Canals; Jaume Segura 001 (J. Electron. Test., 2004)

A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. - Bartomeu Alorda; Sebastià A. Bota; Jaume Segura 001 (IOLTS, 2005)

Charge-based testing BIST for embedded memories. - Bartomeu Alorda; Ivan de Paúl; Jaume Segura 001 (IET Comput. Digit. Tech., 2007)

Critical charge characterization in 6-T SRAMs during read mode. - Sebastià A. Bota; Gabriel Torrens; Bartomeu Alorda (IOLTS, 2009)

Static and dynamic stability improvement strategies for 6T CMOS low-power SRAMs. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (DATE, 2010)

Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Bartomeu Alorda; Jaume Verd; Jaume Segura 001 (IOLTS, 2010)

Design Hardening of Nanometer SRAMs Through Transistor Width Modulation and Multi-Vt Combination. - Gabriel Torrens; Bartomeu Alorda; Salvador Barceló; José Luis Rosselló; Sebastià A. Bota; Jaume Segura 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

Stability optimization of embedded 8T SRAMs using Word-Line Voltage modulation. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (DATE, 2011)

Design and evaluation of a microprocessor course combining three cooperative methods: SDLA, PjBL and CnBL. - Bartomeu Alorda; Kay Suenaga; Pere Pons (Comput. Educ., 2011)

8T vs. 6T SRAM cell radiation robustness: A comparative analysis. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2011)

Understanding the Role of Transmission Power in Component-Based Architectures for Adaptive WSN. - Guillermo Rodríguez-Navas; Miquel A. Ribot; Bartomeu Alorda (COMPSAC Workshops, 2012)

Multi-subject Project Based Learning initiative. - Bartomeu Alorda; Jaume Verd; Vincent Canals; Kay Suenaga; V. Martinez (EDUCON, 2012)

Accurate alpha soft error rate evaluation in SRAM memories. - Sebastià A. Bota; Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; L. A. Segura (IOLTS, 2013)

Word-line power supply selector for stability improvement of embedded SRAMs in high reliability applications. - Bartomeu Alorda; Cristian Carmona; Sebastià A. Bota (DATE, 2014)

Energy consumption savings in ZigBee-based WSN adjusting power transmission at application layer. - Cristian Carmona; Bartomeu Alorda; Miquel A. Ribot (PATMOS, 2014)

Adaptive static and dynamic noise margin improvement in minimum-sized 6T-SRAM cells. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota; Jaume Segura 001 (Microelectron. Reliab., 2014)

On-line write margin estimator to monitor performance degradation in SRAM cores. - Bartomeu Alorda; Cristian Carmona; Gabriel Torrens; Sebastià A. Bota (IOLTS, 2016)

An affordable experimental technique for SRAM write margin characterization for nanometer CMOS technologies. - Bartomeu Alorda; Cristian Carmona; Gabriel Torrens; Sebastià A. Bota (Microelectron. Reliab., 2016)

Evaluation of SRAM cell write margin metrics for lifetime monitoring of BTI-induced Vth drift. - Bartomeu Alorda; Gabriel Torrens (DTIS, 2017)

Cantilever NEMS relay-based SRAM devices for enhanced reliability. - Sebastià A. Bota; Jaume Verd; Joan Barceló; Xavier Gili; Bartomeu Alorda; Gabriel Torrens; Carol de Benito; Jaume Segura 001 (DTIS, 2017)

6T CMOS SRAMs reliability monitoring through stability measurements. - Bartomeu Alorda; Gabriel Torrens; Sebastià A. Bota (IOLTS, 2017)

Weak and Strong SRAM cells analysis in embedded memories for PUF applications. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2019)

Overheating Mitigation Strategies Analysis: A Mediterranean Case Study. - Bartomeu Alorda; Cristian Carmona; Juan Muñoz; Francesc Masdeu; Gabriel Horrach (Intelligent Environments (Workshops), 2019)

Intelligent Energy Consumption in the Balearic Islands Hotels. - Andreu Moià-Pol; Pere Rullan; Bartomeu Alorda (Intelligent Environments (Workshops), 2019)

A 65-nm Reliable 6T CMOS SRAM Cell with Minimum Size Transistors. - Gabriel Torrens; Bartomeu Alorda; Cristian Carmona; Daniel Malagón-Periánez; Jaume Segura 001; Sebastià A. Bota (IEEE Trans. Emerg. Top. Comput., 2019)

Selection of SRAM Cells to improve Reliable PUF implementation using Cell Mismatch Metric. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2020)

New Approach to Indoor Thermal Climate Control Using Natural Building Envelope and Cross Ventilation Techniques. - Cristian Carmona; Juan Muñoz; Bartomeu Alorda (Intelligent Environments (Workshops), 2020)

Intelligent Thermal Storage in the Balearic Islands Hotels with Solar Energy. - Andreu Moià-Pol; Pere Rullan; Bartomeu Alorda (Intelligent Environments (Workshops), 2020)

Bit-Cell Selection Analysis for Embedded SRAM-Based PUF. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (ISCAS, 2020)

SRAM-cells Reproducibility Metrics for Physical Unclonable Function Applications. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (DCIS, 2022)

SRAM Alpha-SER Estimation From Word-Line Voltage Margin Measurements: Design Architecture and Experimental Results. - Gabriel Torrens; Ivan de Paúl; Bartomeu Alorda; Sebastià A. Bota; Jaume Segura 001 (CoRR, 2024)

Estimation during Design Phases of Suitable SRAM Cells for PUF Applications Using Separatrix and Mismatch Metrics. - Abdel Alheyasat; Gabriel Torrens; Sebastià A. Bota; Bartomeu Alorda (CoRR, 2024)

SRAM-Based PUF Reliability Prediction Using Cell-Imbalance Characterization in the State Space Diagram. - Gabriel Torrens; Abdel Alheyasat; Bartomeu Alorda; Sebastià A. Bota (CoRR, 2024)