40-Gb/s circuits built from a 120-GHz fT SiGe technology. - Greg G. Freeman; Mounir Meghelli; Young Kwark; Steven Zier; Alexander V. Rylyakov; Michael Sorna; Todd Tanji; Oswin M. Schreiber; Keith Walter; Jae-Sung Rieh; Basanth Jagannathan; Alvin J. Joseph; et al. (IEEE J. Solid State Circuits, 2002)

Product applications and technology directions with SiGe BiCMOS. - Alvin J. Joseph; James S. Dunn; Greg G. Freeman; David L. Harame; Douglas Coolbaugh; Robert A. Groves; Kenneth J. Stein; Rich Volant; Seshadri Subbanna; V. S. Marangos; Stephen St. Onge; Ebenezer Eshun; et al. (IEEE J. Solid State Circuits, 2003)

RFCMOS technology from 0.25μm to 65nm: the state of the art. - John J. Pekarik; David R. Greenberg; Basanth Jagannathan; Robert A. Groves; J. R. Jones; Raminderpal Singh; Anil Chinthakindi; Xudong Wang; Matthew J. Breitwisch; Douglas D. Coolbaugh; Peter E. Cottrell; John E. Florkey; et al. (CICC, 2004)

Status and Direction of Communication Technologies - SiGe BiCMOS and RFCMOS. - Alvin J. Joseph; David L. Harame; Basanth Jagannathan; Douglas D. Coolbaugh; David C. Ahlgren; John Magerlein; Louis D. Lanzerotti; Natalie B. Feilchenfeld; Stephen A. St. Onge; James S. Dunn; Edward J. Nowak (Proc. IEEE, 2005)

A 1.1V 150GHz amplifier with 8dB gain and +6dBm saturated output power in standard digital 65nm CMOS using dummy-prefilled microstrip lines. - Munkyo Seo; Basanth Jagannathan; Corrado Carta; John J. Pekarik; Luis Chen; C. Patrick Yue; Mark J. W. Rodwell (ISSCC, 2009)

A 150 GHz Amplifier With 8 dB Gain and +6 dBm Psat in Digital 65 nm CMOS Using Dummy-Prefilled Microstrip Lines. - Munkyo Seo; Basanth Jagannathan; John J. Pekarik; Mark J. W. Rodwell (IEEE J. Solid State Circuits, 2009)

Fully depleted extremely thin SOI for mainstream 20nm low-power technology and beyond. - Ali Khaki-Firooz; Kangguo Cheng; Basanth Jagannathan; Pranita Kulkarni; Jeffrey W. Sleight; Davood Shahrjerdi; Josephine B. Chang; Sungjae Lee; Junjun Li; Huiming Bu; Robert Gauthier 002; Bruce Doris; et al. (ISSCC, 2010)

Effect of Substrate Contact Shape and Placement on RF Characteristics of 45 nm Low Power CMOS Devices. - Usha Gogineni; Hongmei Li; Jesús A. del Alamo; Susan L. Sweeney; Jing Wang; Basanth Jagannathan (IEEE J. Solid State Circuits, 2010)