A Novel Low Power NOR gate in SOI CMOS Technology. - Fatemeh Aezinia; Behjat Forouzandeh (APCCAS, 2006)

Modified analytical model for subthreshold current in short channel MOSFET's. - Mohammad Mahdi Khafaji; Mahmoud Kamarei; Behjat Forouzandeh (IEICE Electron. Express, 2007)

Delay testing of PD-SOI circuits. - Morteza Damavandpeyma; Rasoul Yousefi; Behjat Forouzandeh (IEICE Electron. Express, 2008)

Design of a two-capacitor sample & hold circuit using a two-stage OTA with hybrid cascode compensation. - Mahmoud Zangeneh; Hossein Aghababa; Behjat Forouzandeh (ECCTD, 2009)

Low-power variable gain amplifier with wide UGBW based on nanoscale Field Effect Diode. - Farzan Jazayeri; Behjat Forouzandeh; Farshid Raissi (IEICE Electron. Express, 2009)

Statistical delay modeling of read operation of SRAMs due to channel length variation. - Hossein Aghababa; Mahmoud Zangeneh; Ali Afzali-Kusha; Behjat Forouzandeh (ISCAS, 2010)

Low-power and high-performance Automatic Gain Control systems based on nanoscale Field Effect Diode and SOI-MOSFET. - Farzan Jazayeri; Farshid Raissi; Behjat Forouzandeh (IEICE Electron. Express, 2010)

A novel ultra low-energy sub-threshold inverter based on nanoscale Field Effect Diode. - Farzan Jazayeri; Ahmad Sammak; Behjat Forouzandeh; Farshid Raissi (IEICE Electron. Express, 2010)

A 12.5Gb/s active-inductor based transmitter for I/O applications. - Pedram Payandehnia; Behjat Forouzandeh; Aliazam Abbasfar; Samad Sheikhaei; Kambiz Nanbakhsh (ECCTD, 2011)

Quantum Division Circuit Based on Restoring Division Algorithm. - Alireza Khosropour; Hossein Aghababa; Behjat Forouzandeh (ITNG, 2011)

Chip Level Statistical Leakage Power Estimation Using Generalized Extreme Value Distribution. - Alireza Khosropour; Hossein Aghababa; Ali Afzali-Kusha; Behjat Forouzandeh (PATMOS, 2011)

Finding optimum value of numerical aperture for the best aerial image quality. - Hossein Aghababa; Reza Asadpour; Ali Afzali-Kusha; Behjat Forouzandeh (IEICE Electron. Express, 2011)

G4-FET modeling for circuit simulation by adaptive neuro-fuzzy training systems. - Hossein Aghababa; Behzad Ebrahimi; Mehdi Saremi; Vahid Moalemi; Behjat Forouzandeh (IEICE Electron. Express, 2012)

Statistical estimation of leakage power dissipation in nano-scale complementary metal oxide semiconductor digital circuits using generalised extreme value distribution. - Hossein Aghababa; Alireza Khosropour; Ali Afzali-Kusha; Behjat Forouzandeh; Massoud Pedram (IET Circuits Devices Syst., 2012)

High-performance low-leakage regions of nano-scaled CMOS digital gates under variations of threshold voltage and mobility. - Hossein Aghababa; Behjat Forouzandeh; Ali Afzali-Kusha (J. Zhejiang Univ. Sci. C, 2012)

A 12.5 Gb/s 6.6 mW receiver with analog equalizer and 1-tap DFE. - Pedram Payandehnia; Samad Sheikhaei; Aliazam Abbasfar; Behjat Forouzandeh (Microelectron. J., 2012)

Hybrid history-based test overlapping to reduce test application time. - Vahid Janfaza; Bahjat Forouzandeh; Payman Behnam; Mohammadreza Najafi (EWDTS, 2014)

A mathematical model for estimating acceptable ratio of test patterns. - Vahid Janfaza; Paniz Foroutan; Bahjat Forouzandeh; M. H. Haghbayan (EWDTS, 2014)

A Low-Power Enhanced Bitmask-Dictionary Scheme for Test Data Compression. - Vahid Janfaza; Payman Behnam; Bahjat Forouzandeh; Bijan Alizadeh (ISVLSI, 2014)

A Timing Error Mitigation Technique for High Performance Designs. - Mehrnaz Ahmadi; Bijan Alizadeh; Behjat Forouzandeh (ISVLSI, 2015)

A 0.8-V supply bulk-driven operational transconductance amplifier and Gm-C filter in 0.18 µm CMOS process. - Soolmaz Abbasalizadeh; Samad Sheikhaei; Behjat Forouzandeh (Int. J. Circuit Theory Appl., 2015)

Analysis of stress effects on timing of nano-scaled CMOS digital integrated circuits. - Hossein Aghababa; Mohammadreza Kolahdouz; Behjat Forouzandeh (PATMOS, 2016)

UAFEA: Unified Analytical Framework for IA/AA-Based Error Analysis of Fixed-Point Polynomial Specifications. - Mahdieh Grailoo; Bijan Alizadeh; Behjat Forouzandeh (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

Improved Range Analysis in Fixed-Point Polynomial Data-Path. - Mahdieh Grailoo; Bijan Alizadeh; Behjat Forouzandeh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

A Hybrid Time Borrowing Technique to Improve the Performance of Digital Circuits in the Presence of Variations. - Mehrnaz Ahmadi; Bijan Alizadeh; Behjat Forouzandeh (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

FPGA implementation of an adaptive window size image impulse noise suppression system. - Parham Taghinia Jelodari; Mojtaba Parsa Kordasiabi; Samad Sheikhaei; Behjat Forouzandeh (J. Real Time Image Process., 2019)

An O(1) time complexity sorting network for small number of inputs with hardware implementation. - Parham Taghinia Jelodari; Mojtaba Parsa Kordasiabi; Samad Sheikhaei; Behjat Forouzandeh (Microprocess. Microsystems, 2020)

Low Complexity Multiplierless Welch Estimator Based on Memory-Based FFT. - Abdolvahab Khalili Sadaghiani; Samad Sheikhaei; Behjat Forouzandeh (J. Circuits Syst. Comput., 2022)

Low-power hardware-efficient memory-based DCT processor. - Abdolvahab Khalili Sadaghiani; Behjat Forouzandeh (J. Real Time Image Process., 2022)

Image interpolation based on 2D-DWT and HDP-HMM. - Abdolvahab Khalili Sadaghiani; Behjat Forouzandeh (Pattern Anal. Appl., 2022)

Novel low-power pipelined DCT processor for real-time IoT applications. - Abdolvahab Khalili Sadaghiani; Behjat Forouzandeh (J. Real Time Image Process., 2023)

Image Interpolation Based on 2D-DWT with Novel Regularity-Preserving Algorithm Using RLS Adaptive Filters. - Abdolvahab Khalili Sadaghiani; Samad Sheikhaei; Behjat Forouzandeh (Int. J. Image Graph., 2023)

High-performance power spectral/bispectral estimator for biomedical signal processing applications using novel memory-based FFT processor. - Abdolvahab Khalili Sadaghiani; Behjat Forouzandeh (Integr., 2024)