PathAware: A contention-aware selection function for application-specific Network-On-Chips. - Behrad Niazmand; Midia Reshadi; Akram Reza (NORCHIP, 2012)

A loss aware scalable topology for photonic on chip interconnection networks. - Akram Reza; Hamid Sarbazi-Azad; Ahmad Khademzadeh; Hesam Shabani; Behrad Niazmand (J. Supercomput., 2014)

A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers. - Pietro Saltarelli; Behrad Niazmand; Jaan Raik; Ranganathan Hariharan; Gert Jervan; Thomas Hollstein (DSD, 2015)

A Framework for Combining Concurrent Checking and On-Line Embedded Test for Low-Latency Fault Detection in NoC Routers. - Pietro Saltarelli; Behrad Niazmand; Jaan Raik; Vineeth Govind; Thomas Hollstein; Gert Jervan; Ranganathan Hariharan (NOCS, 2015)

Mixed-criticality NoC partitioning based on the NoCDepend dependability technique. - Thomas Hollstein; Siavoosh Payandeh Azad; Thilo Kogge; Behrad Niazmand (ReCoSoC, 2015)

Automated minimization of concurrent online checkers for Network-on-Chips. - Pietro Saltarelli; Behrad Niazmand; Ranganathan Hariharan; Jaan Raik; Gert Jervan; Thomas Hollstein (ReCoSoC, 2015)

Logic-based implementation of fault-tolerant routing in 3D network-on-chips. - Behrad Niazmand; Siavoosh Payandeh Azad; José Flich; Jaan Raik; Gert Jervan; Thomas Hollstein (NOCS, 2016)

SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints. - Siavoosh Payandeh Azad; Behrad Niazmand; Peeter Ellervee; Jaan Raik; Gert Jervan; Thomas Hollstein (ReCoSoC, 2016)

Holistic Approach for Fault-Tolerant Network-on-Chip based Many-Core Systems. - Siavoosh Payandeh Azad; Behrad Niazmand; Jaan Raik; Gert Jervan; Thomas Hollstein (CoRR, 2016)

From online fault detection to fault management in Network-on-Chips: A ground-up approach. - Siavoosh Payandeh Azad; Behrad Niazmand; Karl Janson; Nevin George; Stephen Adeboye Oyeniran; Tsotne Putkaradze; Apneet Kaur; Jaan Raik; Gert Jervan; Raimund Ubar; Thomas Hollstein (DDECS, 2017)

Automated area and coverage optimization of minimal latency checkers. - Siavoosh Payandeh Azad; Behrad Niazmand; Apneet Kaur Sandhu; Jaan Raik; Gert Jervan; Thomas Hollstein (ETS, 2017)

Comprehensive performance and robustness analysis of 2D turn models for network-on-chips. - Siavoosh Payandeh Azad; Behrad Niazmand; Karl Janson; Thilo Kogge; Jaan Raik; Gert Jervan; Thomas Hollstein (ISCAS, 2017)

Fault-resilient NoC router with transparent resource allocation. - Tsotne Putkaradze; Siavoosh Payandeh Azad; Behrad Niazmand; Jaan Raik; Gert Jervan (ReCoSoC, 2017)

From RTL Liveness Assertions to Cost-Effective Hardware Checkers. - Ranganathan Hariharan; Tara Ghasempouri; Behrad Niazmand; Jaan Raik (DCIS, 2018)

QoSinNoC: Analysis of QoS-Aware NoC Architectures for Mixed-Criticality Applications. - Serhiy Avramenko; Siavoosh Payandeh Azad; Stefano Esposito; Behrad Niazmand; Massimo Violante; Jaan Raik; Maksim Jenihhin (DDECS, 2018)

Enabling Secure MPSoC Dynamic Operation through Protected Communication. - Siavoosh Payandeh Azad; Behrad Niazmand; Gert Jervan; Johanna Sepúlveda (ICECS, 2018)

An Automatic Approach to Evaluate Assertions' Quality Based on Data-Mining Metrics. - Tara Ghasempouri; Siavoosh Payandeh Azad; Behrad Niazmand; Jaan Raik (ITC-Asia, 2018)

A Hierarchical Approach for Devising Area Efficient Concurrent Online Checkers. - Behrad Niazmand; Siavoosh Payandeh Azad; Tara Ghasempouri; Jaan Raik; Gert Jervan (ITC-Asia, 2018)

AWAIT: An Ultra-Lightweight Soft-Error Mitigation Mechanism for Network-on-Chip Links. - Karl Janson; Rene Pihlak; Siavoosh Payandeh Azad; Behrad Niazmand; Gert Jervan; Jaan Raik (ReCoSoC, 2018)

Understanding MPSoCs: exploiting memory microarchitectural vulnerabilities of high performance NoC-based MPSoCs. - Johanna Sepúlveda; Cezar Reinbrecht; Siavoosh Payandeh Azad; Behrad Niazmand; Gert Jervan (SAMOS, 2018)

Upgrading QoSinNoC: Efficient Routing for Mixed-Criticality Applications and Power Analysis. - Serhiy Avramenko; Siavoosh Payandeh Azad; Behrad Niazmand; Massimo Violante; Jaan Raik; Maksim Jenihhin (VLSI-SoC, 2018)

Design and Verification of Secure Cache Wrapper Against Access-Driven Side-Channel Attacks. - Behrad Niazmand; Siavoosh Payandeh Azad; Gert Jervan; Johanna Sepúlveda (DSD, 2019)

LiD-CAT: A Lightweight Detector for Cache ATtacks. - Cezar Reinbrecht; Said Hamdioui; Mottaqiallah Taouil; Behrad Niazmand; Tara Ghasempouri; Jaan Raik; Johanna Sepúlveda (ETS, 2020)