A Highly Digital MDLL-Based Clock Multiplier That Leverages a Self-Scrambling Time-to-Digital Converter to Achieve Subpicosecond Jitter Performance. - Belal Helal; Matthew Z. Straayer; Gu-Yeon Wei; Michael H. Perrott (IEEE J. Solid State Circuits, 2008)

Techniques for low jitter clock multiplication. - Belal Helal (2008)

A Low Jitter Programmable Clock Multiplier Based on a Pulse Injection-Locked Oscillator With a Highly-Digital Tuning Loop. - Belal Helal; Chun-Ming Hsu; Kerwin Johnson; Michael H. Perrott (IEEE J. Solid State Circuits, 2009)

A 1.2 mm2 fully integrated GPS radio with cellular/WiFi Co-existence. - Paul Yu; Todd Sepke; Belal Helal; Shervin Shekarchian; Danilo Gerna; Konstantinos Sarrigeorgidis; Lydi Smaini; Arnab Mitra 002; James Li; Brian Brunn; Gregory Uehara; Thomas Cho (CICC, 2010)

3.4 A 40/50/100Gb/s PAM-4 Ethernet transceiver in 28nm CMOS. - Karthik Gopalakrishnan; Alan Ren; Amber Tan; Arash Farhood; Arun Tiruvur; Belal Helal; Chang-Feng Loi; Chris Jiang; Halil Cirit; Irene Quek; Jamal Riani; James Gorecki; et al. (ISSCC, 2016)

A background calibrated 28GS/s 8b interleaved SAR ADC in 28nm CMOS. - Michael Q. Le; James Gorecki; Jamal Riani; Jorge Pernillo; A. Tan; K. Gopalakrishnan; Belal Helal; Pulkit Khandelwal; Chang-Feng Loi; Irene Quek; P. Wong; Aaron Buchwald (CICC, 2017)

A 400Gb/s Transceiver for PAM-4 Optical Direct-Detect Application in 16nm FinFET. - Chang-Feng Loi; A. Mellati; Amber Tan; A. Farhoodfar; Arun Tiruvur; Belal Helal; Bob Killips; Farshid Rafiee Rad; Jamal Riani; Jorge Pernillo; J. Sun; J. Wong; et al. (ISSCC, 2019)

8.7 A 112Gb/s ADC-DSP-Based PAM-4 Transceiver for Long-Reach Applications with >40dB Channel Loss in 7nm FinFET. - P. Mishra; A. Tan; Belal Helal; Cheng-Ru Ho; C. Loi; Jamal Riani; J. Sun; Kaizad Mistry; Karthik Raviprakash; L. Tse; M. Davoodi; M. Takefman; et al. (ISSCC, 2021)

A 200Gb/s Low Power DSP-Based Optical Receiver and Transmitter with Integrated TIA and Laser Drivers. - Arik Zafrany; Daniel Burgos; Li Cai; Sau Siong Chong; Colin Cramm; Sadegh Dadash; Vishal Giridharan; Vivek Gurumoorthy; Belal Helal; Cheng-Ru Ho; Amrutha Iyer; Steve Jantzi; et al. (OFC, 2023)

A 212Gb/s PAM-4 Retimer with Integrated High-Swing Optical Driver and Chip-to-Module Long Reach Capability of 40dB in 5nm FinFET. - V. Gurumoorthy; A. Tan; Amrutha Iyer; A. Fan; A. Farhoodfar; B. Alnabulsi; Belal Helal; Cindra Abidin; C. Loi; D. Cartina; H. Lo; Ivan Fabiano; et al. (ISSCC, 2025)