On the need for a new ESD verification methodology to improve the reliability of ICs in advanced 28nm UTBB FD-SOI technology. - Benjamin Viale; Mathieu Fer; Lionel Courau; Philippe Galy; Bruno Allard (Microelectron. Reliab., 2016)

Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part I. - Benjamin Viale; Bruno Allard (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part II. - Benjamin Viale; Bruno Allard (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)