Design of non-contact 2Gb/s I/O test methods for high bandwidth memory (HBM). - Hyunui Lee; Sukyong Kang; Hye-Seung Yu; Won-Joo Yun; Jae-Hun Jung; Sungoh Ahn; Wang-Soo Kim; Beomyong Kil; Yoo-Chang Sung; Sang-Hoon Shin; Yong-Sik Park; Yong-Hwan Kim; et al. (A-SSCC, 2016)

22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme. - Chi-Sung Oh; Ki Chul Chun; Young-Yong Byun; Yong-Ki Kim; So-Young Kim; Yesin Ryu; Jaewon Park; Sinho Kim; Sang-uhn Cha; Dong-Hak Shin; Jungyu Lee 002; Jong-Pil Son; et al. (ISSCC, 2020)

A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme. - Ki Chul Chun; Yong-Ki Kim; Yesin Ryu; Jaewon Park; Chi Sung Oh; Young-Yong Byun; So-Young Kim; Dong-Hak Shin; Jun Gyu Lee 002; Byung-Kyu Ho; Min-Sang Park; Seong-Jin Cho; et al. (IEEE J. Solid State Circuits, 2021)