Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes. - Berkin Akin; Peter A. Milder; Franz Franchetti; James C. Hoe (FCCM, 2012)

Algorithm and architecture optimization for large size two dimensional discrete fourier transform (abstract only). - Berkin Akin; Peter A. Milder; Franz Franchetti; James C. Hoe (FPGA, 2012)

A 3D-stacked logic-in-memory accelerator for application-specific data intensive computing. - Qiuling Zhu; Berkin Akin; Huseyin Ekin Sumbul; Fazle Sadi; James C. Hoe; Larry T. Pileggi; Franz Franchetti (3DIC, 2013)

Understanding the design space of DRAM-optimized hardware FFT accelerators. - Berkin Akin; Franz Franchetti; James C. Hoe (ASAP, 2014)

HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM. - Berkin Akin; James C. Hoe; Franz Franchetti (HPEC, 2014)

Algorithm/hardware co-optimized SAR image reconstruction with 3D-stacked logic in memory. - Fazle Sadi; Berkin Akin; Doru-Thom Popovici; James C. Hoe; Larry T. Pileggi; Franz Franchetti (HPEC, 2014)

FFTS with near-optimal memory access through block data layouts. - Berkin Akin; Franz Franchetti; James C. Hoe (ICASSP, 2014)

Data reorganization in memory using 3D-stacked DRAM. - Berkin Akin; Franz Franchetti; James C. Hoe (ISCA, 2015)

Enabling portable energy efficiency with memory accelerated library. - Qi Guo 001; Tze Meng Low; Nikolaos Alachiotis 001; Berkin Akin; Larry T. Pileggi; James C. Hoe; Franz Franchetti (MICRO, 2015)

HAMLeT Architecture for Parallel Data Reorganization in Memory. - Berkin Akin; Franz Franchetti; James C. Hoe (IEEE Micro, 2016)

FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation. - Berkin Akin; Franz Franchetti; James C. Hoe (J. Signal Process. Syst., 2016)

A case for hardware-supported sub-cache line accesses. - Christopher Schmidt 001; Markus Dreseler; Berkin Akin; Amithaba Roy (DaMoN, 2018)

Dynamic fine-grained sparse memory accesses. - Berkin Akin; Chiachen Chou; Jongsoo Park; Christopher J. Hughes; Rajat Agarwal (MEMSYS, 2018)

Memory system characterization of deep learning workloads. - Zeshan Chishti; Berkin Akin (MEMSYS, 2019)

ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions. - Berkin Akin; Zeshan A. Chishti; Alaa R. Alameldeen (MICRO, 2019)

A Case For Asymmetric Processing in Memory. - Berkin Akin; Alaa R. Alameldeen (IEEE Comput. Archit. Lett., 2019)

Accelerator-aware Neural Network Design using AutoML. - Suyog Gupta; Berkin Akin (CoRR, 2020)

MobileDets: Searching for Object Detection Architectures for Mobile Accelerators. - Yunyang Xiong; Hanxiao Liu; Suyog Gupta; Berkin Akin; Gabriel Bender; Pieter-Jan Kindermans; Mingxing Tan; Vikas Singh; Bo Chen 019 (CoRR, 2020)

Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks. - Amirali Boroumand; Saugata Ghose; Berkin Akin; Ravi Narayanaswami; Geraldo F. Oliveira; Xiaoyu Ma; Eric Shiu; Onur Mutlu (PACT, 2021)

Discovering Multi-Hardware Mobile Models via Architecture Search. - Grace Chu; Okan Arikan; Gabriel Bender; Weijun Wang; Achille Brighton; Pieter-Jan Kindermans; Hanxiao Liu; Berkin Akin; Suyog Gupta; Andrew Howard 002 (CVPR Workshops, 2021)

MobileDets: Searching for Object Detection Architectures for Mobile Accelerators. - Yunyang Xiong; Hanxiao Liu; Suyog Gupta; Berkin Akin; Gabriel Bender; Yongzhe Wang; Pieter-Jan Kindermans; Mingxing Tan; Vikas Singh; Bo Chen 019 (CVPR, 2021)

Apollo: Transferable Architecture Exploration. - Amir Yazdanbakhsh; Christof Angermüller; Berkin Akin; Yanqi Zhou; Albin Jones; Milad Hashemi; Kevin Swersky; Satrajit Chatterjee; Ravi Narayanaswami; James Laudon (CoRR, 2021)

Rethinking Co-design of Neural Architectures and Hardware Accelerators. - Yanqi Zhou; Xuanyi Dong; Berkin Akin; Mingxing Tan; Daiyi Peng; Tianjian Meng; Amir Yazdanbakhsh; Da Huang; Ravi Narayanaswami; James Laudon (CoRR, 2021)

Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models. - Amirali Boroumand; Saugata Ghose; Berkin Akin; Ravi Narayanaswami; Geraldo F. Oliveira; Xiaoyu Ma; Eric Shiu; Onur Mutlu (CoRR, 2021)

Searching for Efficient Neural Architectures for On-Device ML on Edge TPUs. - Berkin Akin; Suyog Gupta; Yun Long; Anton Spiridonov; Zhuo Wang; Marie White; Hao Xu; Ping Zhou; Yanqi Zhou (CVPR Workshops, 2022)

An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks. - Kiran Seshadri; Berkin Akin; James Laudon; Ravi Narayanaswami; Amir Yazdanbakhsh (IISWC, 2022)

Towards the Co-design of Neural Networks and Accelerators. - Yanqi Zhou; Xuanyi Dong; Tianjian Meng; Mingxing Tan; Berkin Akin; Daiyi Peng; Amir Yazdanbakhsh; Da Huang; Ravi Narayanaswami; James Laudon (MLSys, 2022)

MobileNetV4: Universal Models for the Mobile Ecosystem. - Danfeng Qin; Chas Leichner; Manolis Delakis; Marco Fornoni; Shixin Luo; Fan Yang; Weijun Wang; Colby R. Banbury; Chengxi Ye; Berkin Akin; Vaibhav Aggarwal; Tenghui Zhu; et al. (ECCV (40), 2024)