An AWE Technique for Fast Printed Circuit Board Delays. - Bernard N. Sheehan (DAC, 1996)

ENOR: Model Order Reduction of RLC Circuits Using Nodal Equations for Efficient Factorization. - Bernard N. Sheehan (DAC, 1999)

Projective Convolution: RLC Model-Order Reduction Using the Impulse Response. - Bernard N. Sheehan (DATE, 1999)

TICER: realizable reduction of extracted RC circuits. - Bernard N. Sheehan (ICCAD, 1999)

Predicting coupled noise in RC circuits by matching 1, 2, and 3 moments. - Bernard N. Sheehan (DAC, 2000)

Predicting Coupled Noise in RC Circuits. - Bernard N. Sheehan (DATE, 2000)

Osculating Thevenin model for predicting delay and slew of capacitively characterized cells. - Bernard N. Sheehan (DAC, 2002)

Library Compatible Ceff for Gate-Level Timing. - Bernard N. Sheehan (DATE, 2002)

Branch Merge Reduction of RLCM Networks. - Bernard N. Sheehan (ICCAD, 2003)

Higher Order Orthogonal Iteration of Tensors (HOOI) and its Relation to PCA and GLRAM. - Bernard N. Sheehan; Yousef Saad (SDM, 2007)

Realizable Reduction of RC Networks. - Bernard N. Sheehan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)