Design and Evaluation of a Heuristic Optimization Tool Based on Evolutionary Grammars Using PSoCs. - Bernardo Vallejo Mancero; Mireya Zapata; Liliana Topón-Visarrea; Pedro Malagón (WIVACE, 2019)

Acceleration of Evolutionary Grammar Using an MISD Architecture Based on FPGA and Petalinuxs. - Bernardo Vallejo Mancero; Mireya Zapata (AHFE (13), 2020)

Hardware-Software Co-Design for Efficient and Scalable Real-Time Emulation of SNNs on the Edge. - Josep Angel Oltra; Jordi Madrenas; Mireya Zapata; Bernardo Vallejo Mancero; Diana Mata-Hernandez; Shigeo Sato (ISCAS, 2021)

Real-Time Display of Spiking Neural Activity of SIMD Hardware Using an HDMI Interface. - Bernardo Vallejo Mancero; Clément Nader; Jordi Madrenas; Mireya Zapata (ICANN (3), 2022)

Real-Time Monitoring Tool for SNN Hardware Architecture. - Mireya Zapata; Vanessa Vargas; Ariel Cagua; Daniela Alvarez; Bernardo Vallejo Mancero; Jordi Madrenas (WIVACE, 2022)

Real-Time Adaptive Physical Sensor Processing with SNN Hardware. - Jordi Madrenas; Bernardo Vallejo Mancero; Josep Angel Oltra; Mireya Zapata; Jordi Cosp-Vilella; Robert Calatayud; Satoshi Moriya; Shigeo Sato (ICANN (5), 2023)

Real-time hardware emulation of neural cultures: A comparative study of in vitro, in silico and in duris silico models. - Bernardo Vallejo Mancero; Sergio Faci-Lázaro; Mireya Zapata; Jordi Soriano; Jordi Madrenas (Neural Networks, 2024)