Selbstorganisierendes Service Level Management basierend auf Mechanismus-Design. - Bernhard Jungk (Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2009)

On Optimized FPGA Implementations of the SHA-3 Candidate Groestl. - Bernhard Jungk; Steffen Reith; Jürgen Apfelbeck (IACR Cryptol. ePrint Arch., 2009)

On FPGA-Based Implementations of the SHA-3 Candidate Grøstl. - Bernhard Jungk; Steffen Reith (ReConFig, 2010)

On FPGA-based implementations of Gröstl. - Bernhard Jungk; Steffen Reith (IACR Cryptol. ePrint Arch., 2010)

Area-Efficient FPGA Implementations of the SHA-3 Finalists. - Bernhard Jungk; Jürgen Apfelbeck (ReConFig, 2011)

Side-channel resistant AES architecture utilizing randomized composite field representations. - Bernhard Jungk; Marc Stöttinger; Jan Gampe; Steffen Reith; Sorin A. Huss (FPT, 2012)

On a FPGA-based method for authentication using Edwards curves. - André Himmighofen; Bernhard Jungk; Steffen Reith (ReCoSoC, 2013)

Among slow dwarfs and fast giants: A systematic design space exploration of KECCAK. - Bernhard Jungk; Marc Stöttinger (ReCoSoC, 2013)

A systematic study of lightweight hash functions on FPGAs. - Bernhard Jungk; Leandro Rodrigues Lima; Matthias Hiller (ReConFig, 2014)

Automotive security state of the art and future challenges. - Bernhard Jungk (ISIC, 2016)

There ain't no plain key: A PUF based first-order side-channel resistant encryption construction. - Marc Stöttinger; Bernhard Jungk (ISIC, 2016)

Hobbit - Smaller but faster than a dwarf: Revisiting lightweight SHA-3 FPGA implementations. - Bernhard Jungk; Marc Stöttinger (ReConFig, 2016)

FPGA-based evaluation of cryptographic algorithms. - Bernhard Jungk (2016)

Don't fall into a trap: Physical side-channel analysis of ChaCha20-Poly1305. - Bernhard Jungk; Shivam Bhasin (DATE, 2017)

There Goes Your PIN: Exploiting Smartphone Sensor Fusion Under Single and Cross User Setting. - David Berend; Bernhard Jungk; Shivam Bhasin (IACR Cryptol. ePrint Arch., 2017)

On Comparing Side-channel Properties of AES and ChaCha20 on Microcontrollers. - Zakaria Najm; Dirmanto Jap; Bernhard Jungk; Stjepan Picek; Shivam Bhasin (APCCAS, 2018)

Feature Selection Methods for Non-Profiled Side-Channel Attacks on ECC. - Prasanna Ravi; Bernhard Jungk; Dirmanto Jap; Zakaria Najm; Shivam Bhasin (DSP, 2018)

Guessing Your PIN Right: Unlocking Smartphones with Publicly Available Sensor Data. - David Berend; Bernhard Jungk; Shivam Bhasin (ISVLSI, 2018)

XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V. - Wen Wang 007; Bernhard Jungk; Julian Wälde; Shuwen Deng; Naina Gupta 001; Jakub Szefer; Ruben Niederhagen (IACR Cryptol. ePrint Arch., 2018)

Efficient Side-Channel Protections of ARX Ciphers. - Bernhard Jungk; Richard Petri 001; Marc Stöttinger (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018)

XMSS and Embedded Systems. - Wen Wang 007; Bernhard Jungk; Julian Wälde; Shuwen Deng; Naina Gupta 001; Jakub Szefer; Ruben Niederhagen (SAC, 2019)

Serialized lightweight SHA-3 FPGA implementations. - Bernhard Jungk; Marc Stöttinger (Microprocess. Microsystems, 2019)

ASIC Accelerator in 28 nm for the Post-Quantum Digital Signature Scheme XMSS. - Prashanth Mohan; Wen Wang 007; Bernhard Jungk; Ruben Niederhagen; Jakub Szefer; Ken Mai (ICCD, 2020)

Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA. - Wen Wang 007; Shanquan Tian; Bernhard Jungk; Nina Bindel; Patrick Longa; Jakub Szefer (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2020)