Benchmarking Domain Specific Processors: A Case Study of Evaluating a Smart Card Processor Design. - Zhonglei Wang; Thomas Wild; Stefan Rüping; Bernhard Lippmann (ISVLSI, 2008)

Reverse Engineering of Cryptographic Cores by Structural Interpretation Through Graph Analysis. - Michael Werner; Bernhard Lippmann; Johanna Baehr 001; Helmut Gräb (IVSW, 2018)

Integrated flow for reverse engineering of nanoscale technologies. - Bernhard Lippmann; Michael Werner; Niklas Unverricht; Aayush Singla; Peter Egger; Anja Dübotzky; Horst A. Gieser; Martin Rasche; Oliver Kellermann; Helmut Graeb (ASP-DAC, 2019)

Verification of Physical Chip Layouts Using GDSII Design Data. - Aayush Singla; Bernhard Lippmann; Helmut Graeb (IVSW, 2019)

Recovery of 2D and 3D Layout Information through an Advanced Image Stitching Algorithm using Scanning Electron Microscope Images. - Aayush Singla; Bernhard Lippmann; Helmut Graeb (ICPR, 2020)

Verification of physical designs using an integrated reverse engineering flow for nanoscale technologies. - Bernhard Lippmann; Niklas Unverricht; Aayush Singla; Matthias Ludwig 005; Michael Werner; Peter Egger; Anja Dübotzky; Helmut Gräb; Horst A. Gieser; Martin Rasche; Oliver Kellermann (Integr., 2020)

Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions. - Bernhard Lippmann; Ann-Christin Bette; Matthias Ludwig 005; Johannes Mutter; Johanna Baehr 001; Alexander Hepp; Horst A. Gieser; Nicola Kovac; Tobias Zweifel; Martin Rasche; Oliver Kellermann (DATE, 2022)

VE-FIDES: Designing Trustworthy Supply Chains Using Innovative Fingerprinting Implementations. - Bernhard Lippmann; Joel Hatsch; Stefan Seidl; Detlef Houdeau; Niranjana Papagudi Subrahmanyam; Daniel Schneider; Malek Safieh; Anne Passarelli; Aliza Maftun; Michaela Brunner; Tim Music; Michael Pehl; et al. (DATE, 2023)

Counterfeit Detection by Semiconductor Process Technology Inspection. - Matthias Ludwig 005; Ann-Christin Bette; Bernhard Lippmann; Georg Sigl (ETS, 2023)

Multi-Partner Project: Reverse Engineering Methods for Trusted Chip Design (RESEC). - Bernhard Lippmann; Johanna Baehr 001; Alexander Hepp; Horst A. Gieser (DATE, 2025)