Energy and accuracy in multi-stage stochastic computing. - Bert Moons; Marian Verhelst (NEWCAS, 2014)

Energy-Efficiency and Accuracy of Stochastic Computing Circuits in Emerging Technologies. - Bert Moons; Marian Verhelst (IEEE J. Emerg. Sel. Topics Circuits Syst., 2014)

DVAS: Dynamic Voltage Accuracy Scaling for increased energy-efficiency in approximate computing. - Bert Moons; Marian Verhelst (ISLPED, 2015)

A 0.3-2.6 TOPS/W precision-scalable processor for real-time large-scale ConvNets. - Bert Moons; Marian Verhelst (VLSI Circuits, 2016)

Energy-efficient ConvNets through approximate computing. - Bert Moons; Bert De Brabandere; Luc Van Gool; Marian Verhelst (WACV, 2016)

Minimum energy quantized neural networks. - Bert Moons; Koen Goetschalckx; Nick Van Berckelaer; Marian Verhelst (ACSSC, 2017)

DVAFS: Trading computational accuracy for energy through dynamic-voltage-accuracy-frequency-scaling. - Bert Moons; Roel Uytterhoeven; Wim Dehaene; Marian Verhelst (DATE, 2017)

14.5 Envision: A 0.26-to-10TOPS/W subword-parallel dynamic-voltage-accuracy-frequency-scalable Convolutional Neural Network processor in 28nm FDSOI. - Bert Moons; Roel Uytterhoeven; Wim Dehaene; Marian Verhelst (ISSCC, 2017)

An Energy-Efficient Precision-Scalable ConvNet Processor in 40-nm CMOS. - Bert Moons; Marian Verhelst (IEEE J. Solid State Circuits, 2017)

BinarEye: An always-on energy-accuracy-scalable binary CNN processor with all memory on chip in 28nm CMOS. - Bert Moons; Daniel Bankman; Lita Yang; Boris Murmann; Marian Verhelst (CICC, 2018)

TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs. - Gage Hills; Daniel Bankman; Bert Moons; Lita Yang; Jake Hillard; Alex Kahng; Rebecca Park; Marian Verhelst; Boris Murmann; Max M. Shulaker; H.-S. Philip Wong; Subhasish Mitra (DAC, 2018)

Bit Error Tolerance of a CIFAR-10 Binarized Convolutional Neural Network Processor. - Lita Yang; Daniel Bankman; Bert Moons; Marian Verhelst; Boris Murmann (ISCAS, 2018)

An always-on 3.8μJ/86% CIFAR-10 mixed-signal binary CNN processor with all memory on chip in 28nm CMOS. - Daniel Bankman; Lita Yang; Bert Moons; Marian Verhelst; Boris Murmann (ISSCC, 2018)

Efficiently Combining SVD, Pruning, Clustering and Retraining for Enhanced Neural Network Compression. - Koen Goetschalckx; Bert Moons; Patrick Wambacq; Marian Verhelst (EMDL@MobiSys, 2018)

Resource aware design of a deep convolutional-recurrent neural network for speech recognition through audio-visual sensor fusion. - Matthijs Van Keirsbilck; Bert Moons; Marian Verhelst (CoRR, 2018)

Optimized Hierarchical Cascaded Processing. - Koen Goetschalckx; Bert Moons; Steven Lauwereins; Martin Andraud; Marian Verhelst (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

An Always-On 3.8 $ mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS. - Daniel Bankman; Lita Yang; Bert Moons; Marian Verhelst; Boris Murmann (IEEE J. Solid State Circuits, 2019)

Distilling Optimal Neural Networks: Rapid Search in Diverse Spaces. - Bert Moons; Parham Noorzad; Andrii Skliar; Giovanni Mariani; Dushyant Mehta; Chris Lott; Tijmen Blankevoort (ICCV, 2021)

Differentiable Transportation Pruning. - Yunqiang Li; Jan C. van Gemert; Torsten Hoefler; Bert Moons; Evangelos Eleftheriou; Bram-Ernst Verhoef (ICCV, 2023)

11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. - Pascal Alexander Hager; Bert Moons; Stefan Cosemans; Ioannis A. Papistas; Bram Rooseleer; Jeroen Van Loon; Roel Uytterhoeven; Florian Zaruba; Spyridoula Koumousi; Milos Stanisavljevic; Stefan Mach; Sebastiaan Mutsaards; et al. (ISSCC, 2024)