An Accurate Scalable Compact Model for the Substrate Resistance of RF MOSFETs. - Bertrand Parvais; S. Hu; Morin Dehan; Abdelkarim Mercha; Stefaan Decoutere (CICC, 2007)

Analog design challenges and trade-offs using emerging materials and devices. - Michael Fulde; Abdelkarim Mercha; Cedric Gustin; Bertrand Parvais; Vaidyanathan Subramanian; Klaus von Arnim; Florian Bauer; Klaus Schruefer; Doris Schmitt-Landsiedel; Gerhard Knoblinger (ESSCIRC, 2007)

FinFET technology for analog and RF circuits. - Bertrand Parvais; Vaidyanathan Subramanian; Abdelkarim Mercha; Morin Dehan; Piet Wambacq; Willy Sansen; Guido Groeseneken; Stefaan Decoutere (ICECS, 2007)

The Potential of FinFETs for Analog and RF Circuit Applications. - Piet Wambacq; Bob Verbruggen; Karen Scheir; Jonathan Borremans; Morin Dehan; Dimitri Linten; Vincent De Heyn; Geert Van der Plas; Abdelkarim Mercha; Bertrand Parvais; Cedric Gustin; Vaidyanathan Subramanian; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET. - Davide Ponton; Pierpaolo Palestri; David Esseni; Luca Selmi; Marc Tiebout; Bertrand Parvais; Gerhard Knoblinger (ISCAS, 2008)

Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. - Piet Wambacq; Abdelkarim Mercha; Karen Scheir; Bob Verbruggen; Jonathan Borremans; Vincent De Heyn; Steven Thijs; Dimitri Linten; Geert Van der Plas; Bertrand Parvais; Morin Dehan; Stefaan Decoutere; et al. (ISSCC, 2008)

Migrating from planar to FinFET for further CMOS scaling: SOI or bulk? - Thomas Chiarella; Liesbeth Witters; Abdelkarim Mercha; Christoph Kerner; Rok Dittrich; Michal Rakowski; Claude Ortolland; Lars-Åke Ragnarsson; Bertrand Parvais; An De Keersgieter; Stefan Kubicek; Augusto Redolfi; et al. (ESSCIRC, 2009)

FinFET RF receiver building blocks operating above 10 GHz. - Domagoj Siprak; Piet Wambacq; Bertrand Parvais; Abdelkarim Mercha; Michael Fulde; Jesenka Veledar Kruger; Morin Dehan; Stefaan Decoutere (ESSCIRC, 2009)

Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET Devices. - Davide Ponton; Pierpaolo Palestri; David Esseni; Luca Selmi; Marc Tiebout; Bertrand Parvais; Domagoj Siprak; Gerhard Knoblinger (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A 40 nm LP CMOS PLL for high-speed mm-wave communication. - Bertrand Parvais; Karen Scheir; Vojkan Vidojkovic; R. Vandebriel; Gerd Vandersteen; Charlotte Soens; Piet Wambacq (ESSCIRC, 2010)

Identifying the Bottlenecks to the RF Performance of FinFETs. - Vaidyanathan Subramanian; Abdelkarim Mercha; Bertrand Parvais; Morin Dehan; Guido Groeseneken; Willy M. C. Sansen; Stefaan Decoutere (VLSI Design, 2010)

A low-power 57-to-66GHz transceiver in 40nm LP CMOS with -17dB EVM at 7Gb/s. - Vojkan Vidojkovic; Giovanni Mangraviti; Khaled Khalaf; Viki Szortyka; Kristof Vaesen; Wim Van Thillo; Bertrand Parvais; Mike Libois; Steven Thijs; John R. Long; Charlotte Soens; Piet Wambacq (ISSCC, 2012)

CMOS low-power transceivers for 60GHz multi Gbit/s communications. - Vojkan Vidojkovic; Viki Szortyka; Khaled Khalaf; Giovanni Mangraviti; Bertrand Parvais; Kristof Vaesen; Steven Brebels; Annachiara Spagnolo; Michael Libois; John R. Long; Kuba Raczkowski; Praveen Raghavan; et al. (CICC, 2013)

A low-power radio chipset in 40nm LP CMOS with beamforming for 60GHz high-data-rate wireless communication. - Vojkan Vidojkovic; Viki Szortyka; Khaled Khalaf; Giovanni Mangraviti; Steven Brebels; Wim Van Thillo; Kristof Vaesen; Bertrand Parvais; Vadim Issakov; Mike Libois; Michiaki Matsuo; John R. Long; et al. (ISSCC, 2013)

Design Technology co-optimization for N10. - Julien Ryckaert; Praveen Raghavan; Rogier Baert; Marie Garcia Bardon; Mircea Dusa; Arindam Mallik; Sushil Sakhare; Boris Vandewalle; Piet Wambacq; Bharani Chava; Kris Croes; Morin Dehan; et al. (CICC, 2014)

14.2 A 79GHz phase-modulated 4GHz-BW CW radar TX in 28nm CMOS. - Vito Giannini; Davide Guermandi; Qixian Shi; Kristof Vaesen; Bertrand Parvais; Wim Van Thillo; André Bourdoux; Charlotte Soens; Jan Craninckx; Piet Wambacq (ISSCC, 2014)

21.4 A 42mW 230fs-jitter sub-sampling 60GHz PLL in 40nm CMOS. - Viki Szortyka; Qixian Shi; Kuba Raczkowski; Bertrand Parvais; Maarten Kuijk; Piet Wambacq (ISSCC, 2014)

A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS. - Bertrand Parvais; Piet Wambacq; Abdelkarim Mercha; Diederik Verkest; Aaron Thean; Ken Sawada; Kazuki Nomoto; Tetsuya Oishi; Hiroaki Ammo (A-SSCC, 2015)

Modeling FinFET metal gate stack resistance for 14nm node and beyond. - Kenichi Miyaguchi; Bertrand Parvais; Lars-Åke Ragnarsson; Piet Wambacq; Praveen Raghavan; Abdelkarim Mercha; Anda Mocuta; Diederik Verkest; Aaron Thean (ICICDT, 2015)

A 42 mW 200 fs-Jitter 60 GHz Sub-Sampling PLL in 40 nm CMOS. - Viki Szortyka; Qixian Shi; Kuba Raczkowski; Bertrand Parvais; Maarten Kuijk; Piet Wambacq (IEEE J. Solid State Circuits, 2015)

Back-gate bias effect on UTBB-FDSOI non-linearity performance. - B. Kazemi Esfeh; Valeria Kilchytska; Bertrand Parvais; Nicolas Planes; M. Haond; Denis Flandre; Jean-Pierre Raskin (ESSDERC, 2017)

Scaling CMOS beyond Si FinFET: an analog/RF perspective. - Bertrand Parvais; Geert Hellings; Marko Simicic; Pieter Weckx; Jérôme Mitard; Doyoung Jang; V. Deshpande; B. van Liempc; Anabela Veloso; A. Vandooren; Niamh Waldron; Piet Wambacq; et al. (ESSDERC, 2018)

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling. - A. Vandooren; Liesbeth Witters; Jacopo Franco; Arindam Mallik; Bertrand Parvais; Z. Wu; Amey Walke; V. Deshpande; E. Rosseel; Andriy Hikavyy; W. Li; L. Peng; et al. (ICICDT, 2018)

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability. - Ben Kaczer; Jacopo Franco; Pieter Weckx; Philippe Roussel; Vamsi Putcha; Erik Bury; Marko Simicic; Adrian Vaisman Chasin; Dimitri Linten; Bertrand Parvais; Francky Catthoor; Gerhard Rzepa; et al. (Microelectron. Reliab., 2018)

Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applications. - Dongyang Yan; Mark Ingels; Giovanni Mangraviti; Yao Liu; Bertrand Parvais; Niamh Waldron; Nadine Collaert; Piet Wambacq (NEWCAS, 2019)

Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations. - Marko Simicic; Pieter Weckx; Bertrand Parvais; Philippe Roussel; Ben Kaczer; Georges G. E. Gielen (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Device Scaling roadmap and its implications for Logic and Analog platform. - Alessio Spessot; Bertrand Parvais; Amita Rawat; Kenichi Miyaguchi; Pieter Weckx; Doyoung Jang; Julien Ryckaert (BCICTS, 2020)

Reliability and Variability of Advanced CMOS Devices at Cryogenic Temperatures. - Alexander Grill; Erik Bury; Jakob Michl; Stanislav Tyaginov; Dimitri Linten; Tibor Grasser; Bertrand Parvais; Ben Kaczer; Michael Waltl; Iuliana P. Radu (IRPS, 2020)

Exploring the DC reliability metrics for scaled GaN-on-Si devices targeted for RF/5G applications. - Vamsi Putcha; Erik Bury; Jacopo Franco; Amey Walke; Simeng Zhao; Uthayasankaran Peralagu; Ming Zhao; AliReza Alian; Ben Kaczer; Niamh Waldron; Dimitri Linten; Bertrand Parvais; et al. (IRPS, 2020)

Impact of III-N buffer layers on RF losses and harmonic distortion of GaN-on-Si Substrates. - Pieter Cardinael; Sachin Yadav 001; Ming Zhao; Martin Rack; Dimitri Lederer; Nadine Collaert; Bertrand Parvais; Jean-Pierre Raskin (ESSDERC, 2021)

CMOS compatible GaN-on-Si HEMT technology for RF applications: analysis of substrate losses and non-linearities. - Sachin Yadav 001; Pieter Cardinael; Ming Zhao; Komal Vondkar; Uthayasankaran Peralagu; AliReza Alian; Ahmad Khaled; Sergej Makovejev; Enrique Ekoga; Dimitri Lederer; Jean-Pierre Raskin; Bertrand Parvais; et al. (ICICDT, 2021)

Understanding the memory window in 1T-FeFET memories: a depolarization field perspective. - K. Kaczmarek; Marie Garcia Bardon; Y. Xiang; Laurent Breuil; Nicolo Ronchi; Bertrand Parvais; Guido Groeseneken; Jan Van Houdt (IMW, 2021)

On the impact of buffer and GaN-channel thickness on current dispersion for GaN-on-Si RF/mmWave devices. - Vamsi Putcha; Liang Cheng; AliReza Alian; Ming Zhao; Hai Lu; Bertrand Parvais; Niamh Waldron; Dimitri Linten; Nadine Collaert (IRPS, 2021)

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies. - Gerhard Rzepa; Markus Karner; Oskar Baumgartner; Georg Strof; Franz Schanovsky; Ferdinand Mitterbauer; Christian Kernstock; Hui-Wen Karner; Pieter Weckx; Geert Hellings; Dieter Claes; Zhicheng Wu; et al. (IRPS, 2021)

A BSIM-Based Predictive Hot-Carrier Aging Compact Model. - Yang Xiang; Stanislav Tyaginov; Michiel Vandemaele; Zhicheng Wu; Jacopo Franco; Erik Bury; Brecht Truijen; Bertrand Parvais; Dimitri Linten; Ben Kaczer (IRPS, 2021)

Solid state qubits: how learning from CMOS fabrication can speed-up progress in Quantum Computing. - Iuliana P. Radu; Roy Li; Anton Potocnik; Tsvetan Ivanov; Danny Wan; Stefan Kubicek; Nard I. Dumoulin Stuyck; Jeroen Verjauw; Julien Jussot; Yann Canvel; Clement Godfrin; Massimo Mongillo; et al. (VLSI Circuits, 2021)

A 28nm 6.5-8.1GHz 1.16mW/qubit Cryo-CMOS System-an-Chip for Superconducting Qubit Readout. - Steven Van Winckel; Alican Çaglar; Benjamin Gys; Steven Brebels; Anton Potocnik; Bertrand Parvais; Piet Wambacq; Jan Craninckx (ESSCIRC, 2022)

Impact of channel thickness scaling on the performance of GaN-on-Si RF HEMTs on highly C-doped GaN buffer. - AliReza Alian; Raúl Rodríguez; Sachin Yadav 001; Uthayasankaran Peralagu; Arturo Sibaja Hernandez; Vamsi Putcha; Ming Zhao; Rana Y. El Kashlan; Bjorn Vermeersch; Hao Yu; Erik Bury; Ahmad Khaled; et al. (ESSDERC, 2022)

III-V HBTs on 300 mm Si substrates using merged nano-ridges and its application in the study of impact of defects on DC and RF performance. - Abhitosh Vais; Sachin Yadav 001; Yves Mols; Bjorn Vermeersch; Komal Vondkar Kodandarama; Marina Baryshnikova; G. Mannaert; R. Alcotte; Geert Boccardi; Piet Wambacq; Bertrand Parvais; R. Langer; et al. (ESSDERC, 2022)

Temperature Dependent Mismatch and Variability in a Cryo-CMOS Array with 30k Transistors. - Alexander Grill; V. John; Jakob Michl; A. Beckers; Erik Bury; Stanislav Tyaginov; Bertrand Parvais; Adrian Vaisman Chasin; Tibor Grasser; Michael Waltl; Ben Kaczer; Bogdan Govoreanu (IRPS, 2022)

Interpretation and modelling of dynamic-RON kinetics in GaN-on-Si HEMTs for mm-wave applications. - Vamsi Putcha; Hao Yu; Jacopo Franco; Sachin Yadav 001; AliReza Alian; Uthayasankaran Peralagu; Bertrand Parvais; Nadine Collaert (IRPS, 2022)

A Composite AlGaN/cGaN Back Barrier for mm-Wave GaN-on-Si HEMTs. - Rana Y. El Kashlan; Hao Yu; Ahmad Khaled; Sachin Yadav 001; Uthayasankaran Peralagu; AliReza Alian; Nadine Collaert; Piet Wambacq; Bertrand Parvais (ESSDERC, 2023)

DC Reliability Study of $ text{high}- kappa$ GaN-on-Si MOS-HEMT's for mm-Wave Power Amplifiers. - Barry J. O'Sullivan; AliReza Alian; Arturo Sibaja Hernandez; Jacopo Franco; Sachin Yadav 001; Hao Yu; Aarti Rathi; Uthayasankaran Peralagu; Adrian Vaisman Chasin; Bertrand Parvais; Nadine Collaert (IRPS, 2024)

Physical Insights into High Current Collapse under ON-state Stress in RF GaN HEMTs. - Amratansh Gupta; Hao Yu; Sachin Yadav 001; AliReza Alian; Uthavasankaran Peralagu; E.-San Jang; Ying-Chun Kuo; Nadine Collaert; Bertrand Parvais (IRPS, 2025)

Evolution of GaN HEMT Small-Signal Parameters During Semi-on State for RF/MM-Wave Applications. - Aarti Rathi; Barry J. O'Sullivan; R. ElKashlan; B. Kazemi Esfeh; Arturo Sibaja Hernandez; Hao Yu; AliReza Alian; Sachin Yadav 001; Uthayasankaran Peralagu; Adrian Vaisman Chasin; Bertrand Parvais; Nadine Collaert (IRPS, 2025)

Toward Understanding Stability of RF MIS-HEMTs Under ON/SEMI-ON/OFF-State Pulses with Scaling in-situ SiN Thicknesses. - Yi Yang; Hao Yu; Meng-Che Tsai; Wei-Tung Lin; Ying-Chun Kuo; Barry J. O'Sullivan; Aarti Rathi; Amratansh Gupta; Sachin Yadav 001; AliReza Alian; Uthayasankaran Peralagu; Bertrand Parvais; et al. (IRPS, 2025)

Perspectives on GaN MISHEMT Power Amplifier Versus Positive Gate Bias Instability. - Hao Yu; R. ElKashlan; Meng-Che Tsai; Yi Yang; Mamoun Guenach; Ying-Chun Kuo; Sachin Yadav 001; Barry J. O'Sullivan; Aarti Rathi; Amratansh Gupta; D. Xiao; Claude Desset; et al. (IRPS, 2025)