Input data reuse in compiling window operations onto reconfigurable hardware. - Zhi Guo; Betul Buyukkurt; Walid A. Najjar (LCTES, 2004)

Optimized Generation of Data-Path from C Codes for FPGAs. - Zhi Guo; Betul Buyukkurt; Walid A. Najjar; Kees A. Vissers (DATE, 2005)

Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs. - Betul Buyukkurt; Zhi Guo; Walid A. Najjar (ARC, 2006)

Automatic Compilation Framework for Bloom Filter Based Intrusion Detection. - Dinesh C. Suresh; Zhi Guo; Betul Buyukkurt; Walid A. Najjar (ARC, 2006)

Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs. - Betul Buyukkurt; Walid A. Najjar (FPL, 2008)

A Compiler Intermediate Representation for Reconfigurable Fabrics. - Zhi Guo; Betul Buyukkurt; John Cortes; Abhishek Mitra; Walid A. Najjar (Int. J. Parallel Program., 2008)

Efficient hardware code generation for FPGAs. - Zhi Guo; Walid A. Najjar; Betul Buyukkurt (ACM Trans. Archit. Code Optim., 2008)

Impact of high-level transformations within the ROCCC framework. - Betul Buyukkurt; John Cortes; Jason R. Villarreal; Walid A. Najjar (ACM Trans. Archit. Code Optim., 2010)