Improving the Accuracy of Circuit Activity Measurement. - Bhanu Kapoor (DAC, 1994)

Area, performance, and sensitizable paths [logic design]. - Bhanu Kapoor; V. S. S. Nair (Great Lakes Symposium on VLSI, 1994)

Improving Path Sensitizability of Combinational Circuits. - Bhanu Kapoor; V. S. S. Nair (VLSI Design, 1996)

Low Power Memory Architectures for Video Applications. - Bhanu Kapoor (Great Lakes Symposium on VLSI, 1998)

Low-power data transfer and storage exploration for H.263 video decoder system. - Lode Nachtergaele; Francky Catthoor; Bhanu Kapoor; Stefan Janssens; Dennis Moolenaar (IEEE J. Sel. Areas Commun., 1998)

Panel: SoC power management implications on validation and testing. - Bhanu Kapoor; John Goodenough 001; Shankar Hemmady; Shireesh Verma; Manuel A. d'Abreu; Kaushik Roy 001 (HLDVT, 2008)

Tutorial: SoC Power Management Verification and Testing Issues. - Bhanu Kapoor; J. Marc Edwards; Shankar Hemmady; Shireesh Verma; Kaushik Roy 001 (MTV, 2008)

Validating physical access layer of WiMAX using SystemVerilog. - Albert Chiang; Wei-Hua Han; Bhanu Kapoor (ISQED, 2009)

Impact of SoC power management techniques on verification and testing. - Bhanu Kapoor; Shankar Hemmady; Shireesh Verma; Kaushik Roy 001; Manuel A. d'Abreu (ISQED, 2009)

Special Session 11C: Embedded Tutorial: System-on-a-Chip Power Management Implications on Validation and Testing. - Bhanu Kapoor (VTS, 2009)

Power management verification experiences in Wireless SoCs. - Bhanu Kapoor; Alan Hunter 002; Prapanna Tiwari (DATE, 2011)

Embedded tutorial: Addressing critical power management verification issues in low power designs. - Bhanu Kapoor; Knut M. Just (DATE, 2011)

Power Management Design and Verification. - Bhanu Kapoor; Shireesh Verma (J. Low Power Electron., 2011)

State of the art parallel approaches for RSA public key based cryptosystem. - Sapna Saxena; Bhanu Kapoor (CoRR, 2015)