MOS current mode logic exclusive-OR gate using multi-threshold triple-tail cells. - Neeta Pandey; Kirti Gupta; Garima Bhatia; Bharat Choudhary (Microelectron. J., 2016)

New Proposal for MCML Based Three-Input Logic Implementation. - Neeta Pandey; Kirti Gupta; Bharat Choudhary (VLSI Design, 2016)

New Sleep-Based PFSCL Tri-State Inverter/Buffer Topologies. - Neeta Pandey; Bharat Choudhary; Kirti Gupta; Ankit Mittal (J. Circuits Syst. Comput., 2017)

MCML Dynamic Register Design. - Neeta Pandey; Kirti Gupta; Bharat Choudhary (MWSCAS, 2018)

Performance Assessment of High-k SOI GaN FinFET with Different Fin Aspect Ratio for RF/Wireless Applications. - Vandana Singh Rajawat; Bharat Choudhary; Ajay Kumar 004 (Wirel. Pers. Commun., 2024)

NQS Small-Signal Circuit Modelling of GaN-SOI-FinFET for RF/Wireless Applications. - Vandana Singh Rajawat; Bharat Choudhary; Ajay Kumar 004 (Circuits Syst. Signal Process., 2025)