ScalCore: Designing a core for voltage scalability. - Bhargava Gopireddy; Choungki Song; Josep Torrellas; Nam Sung Kim; Aditya Agrawal; Asit K. Mishra (HPCA, 2016)

Sthira: A Formal Approach to Minimize Voltage Guardbands under Variation in Networks-on-Chip for Energy Efficiency. - Raghavendra Pradyumna Pothukuchi; Amin Ansari; Bhargava Gopireddy; Josep Torrellas (PACT, 2017)

Secure Hierarchy-Aware Cache Replacement Policy (SHARP): Defending Against Cache-Based Side Channel Attacks. - Mengjia Yan 001; Bhargava Gopireddy; Thomas Shull; Josep Torrellas (ISCA, 2017)

HetCore: TFET-CMOS Hetero-Device Architecture for CPUs and GPUs. - Bhargava Gopireddy; Dimitrios Skarlatos 002; Wenjuan Zhu 002; Josep Torrellas (ISCA, 2018)

Designing vertical processors in monolithic 3D. - Bhargava Gopireddy; Josep Torrellas (ISCA, 2019)

Attack Directories, Not Caches: Side Channel Attacks in a Non-Inclusive World. - Mengjia Yan 001; Read Sprabery; Bhargava Gopireddy; Christopher W. Fletcher; Roy H. Campbell; Josep Torrellas (IEEE Symposium on Security and Privacy, 2019)

Energy efficient core designs for upcoming process technologies - Bhargava Gopireddy (2019)

MicroScope: Enabling Microarchitectural Replay Attacks. - Dimitrios Skarlatos 002; Mengjia Yan 001; Bhargava Gopireddy; Read Sprabery; Josep Torrellas; Christopher W. Fletcher (IEEE Micro, 2020)

BabelFish: Fusing Address Translations for Containers. - Dimitrios Skarlatos 002; Umur Darbaz; Bhargava Gopireddy; Nam Sung Kim; Josep Torrellas (IEEE Micro, 2021)

Nonuniform-Tensor-Parallelism: Mitigating GPU failure impact for Scaled-up LLM Training. - Daiyaan Arfeen; Dheevatsa Mudigere; Ankit More; Bhargava Gopireddy; Ahmet Inci; Gregory R. Ganger (CoRR, 2025)