Process Aware Ultra-High-Speed Hybrid Sensing Technique for Low Power Near-Threshold SRAM. - Bhupendra Singh Reniwal; Santosh Kumar Vishvakarma (VDAT, 2013)

Dataline Isolated Differential Current Feed/Mode Sense Amplifier for Small Icell SRAM Using FinFET. - Bhupendra Singh Reniwal; Vikas Vijayvargiya; Pooran Singh; Santosh Kumar Vishvakarma; Devesh Dwivedi (ACM Great Lakes Symposium on VLSI, 2015)

Nanoscale Memory Design for Efficient Computation: Trends, Challenges and Opportunity. - Santosh Kumar Vishvakarma; Bhupendra Singh Reniwal; V. Sharma; C. B. Khuswah; Devesh Dwivedi (iNIS, 2015)

An offset-tolerant self-correcting sense amplifier for robust high speed SRAM. - Praneet Bhatia; Bhupendra Singh Reniwal; Santosh Kumar Vishvakarma (VDAT, 2015)

Ultra-Fast Current Mode Sense Amplifier for Small (I_{ mathrm{CELL}} ) SRAM in FinFET with Improved Offset Tolerance. - Bhupendra Singh Reniwal; Vikas Vijayvargiya; Santosh Kumar Vishvakarma; Devesh Dwivedi (Circuits Syst. Signal Process., 2016)

A New Sense Amplifier Design with Improved Input Referred Offset Characteristics for Energy-Efficient SRAM. - Bhupendra Singh Reniwal; Pooran Singh; Vikas Vijayvargiya; Santosh Kumar Vishvakarma (VLSID, 2017)

Dynamic Feedback Controlled Static Random Access Memory for Low Power Applications. - Pooran Singh; Bhupendra Singh Reniwal; Vikas Vijayvargiya; V. Sharma; Santosh Kumar Vishvakarma (J. Low Power Electron., 2017)

Design and investigation of variability aware sense amplifier for low power, high speed SRAM. - Bhupendra Singh Reniwal; Praneet Bhatia; Santosh Kumar Vishvakarma (Microelectron. J., 2017)

Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design. - Pooran Singh; Bhupendra Singh Reniwal; Vikas Vijayvargiya; V. Sharma; Santosh Kumar Vishvakarma (Integr., 2018)

Compact Spiking Neural Network System with SiGe Based Cylindrical Tunneling Transistor for Low Power Applications. - Ankur Beohar; Gopal Raut; Gunjan Rajput; Abhinav Vishwakarma; Ambika Prasad Shah; Bhupendra Singh Reniwal; Santosh Kumar Vishvakarma (VDAT, 2019)

An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM. - Bhupendra Singh Reniwal; Vikas Vijayvargiya; Pooran Singh; Nand Kishor Yadav; Santosh Kumar Vishvakarma; Devesh Dwivedi (Circuits Syst. Signal Process., 2019)

Energy Efficient, Hamming Code Technique for Error Detection/Correction Using In-Memory Computation. - Mythrai; Pragna; Kavitha S; Pooran Singh; A. P. Shah; S. K. Vishwakarma; Bhupendra Singh Reniwal (VDAT, 2021)

An Approach Towards Analog In-Memory Computing for Energy-Efficient Adder in SRAM Array. - S. Kavitha; Santosh Kumar Vishvakarma; Bhupendra Singh Reniwal (VDAT, 2022)

Design and Analysis of Multibit Multiply and Accumulate (MAC) unit: An Analog In-Memory Computing Approach. - Swetha Ananthanarayanan; Bhupendra Singh Reniwal; Abhishek Upadhyay (VLSID, 2023)

Design of Radiation Hardened 12T SRAM with Enhanced Reliability and Read/Write Latency for Space Application. - Mohd Sakib Ansari S; Kavitha S; Bhupendra Singh Reniwal; Santosh Kumar Vishvakarma (VLSID, 2023)

Enabling Energy-Efficient In-Memory Computing With Robust Assist-Based Reconfigurable Sense Amplifier in SRAM Array. - Kavitha Soundrapandiyan; Santosh Kumar Vishvakarma; Bhupendra Singh Reniwal (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

CiMComp: An Energy Efficient Compute-in-Memory Based Comparator for Convolutional Neural Networks. - Kavitha S; Binsu J. Kailath; Bhupendra Singh Reniwal (DATE, 2024)

Spatially Invariant Convolutional Spiking Neural Network For Resource-Constrained IoT Devices. - Chetali Yadav; Bhupendra Singh Reniwal (Circuits Syst. Signal Process., 2025)