Graceful Fault tolerance in large networks of microcomputers. - Dharma P. Agrawal; Bhuwan K. Agrawal; Girish C. Pathak (ICDCS, 1982)

On design and performance of VLSI based parallel multiplier. - Dharma P. Agrawal; Girish C. Pathak; Nikunja K. Swain; Bhuwan K. Agrawal (IEEE Symposium on Computer Arithmetic, 1983)

Timing Driven Placement Using Complete Path Delays. - Wilm E. Donath; Reini J. Norman; Bhuwan K. Agrawal; Stephen E. Bello; Sang-Yong Han; Jerome M. Kurtzberg; Paul Lowy; Roger I. McMillan (DAC, 1990)

Worst case clock skew under power supply variations. - Min Zhao 001; Kaushik Gala; Vladimir Zolotov; Yuhong Fu; Rajendran Panda; R. Ramkumar; Bhuwan K. Agrawal (Timing Issues in the Specification and Synthesis of Digital Systems, 2002)