SATD hardware architecture based on 8×8 Hadamard Transform for HEVC encoder. - Bianca Silveira; Cláudio Machado Diniz; Mateus Fonseca; Eduardo A. C. da Costa (ICECS, 2015)

Power-efficient sum of absolute differences architecture using adder compressors. - Bianca Silveira; Guilherme Paim; Cláudio Machado Diniz; Eduardo A. C. da Costa (ICECS, 2016)

Exploiting absolute arithmetic for power-efficient sum of absolute differences. - Brunno Abreu; Guilherme Paim; Mateus Grellert; Bianca Silveira; Cláudio Machado Diniz; Eduardo Costa 001; Sergio Bampi (ICECS, 2017)

Exploring the use of parallel prefix adder topologies into approximate adder circuits. - Morgana Macedo; Leonardo Bandeira Soares; Bianca Silveira; Cláudio Machado Diniz; Eduardo A. C. da Costa (ICECS, 2017)

Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding. - Bianca Silveira; Brunno Abreu; Guilherme Paim; Mateus Grellert; Rafael S. Ferreira; Cláudio Machado Diniz; Eduardo Costa 001; Sergio Bampi (ICECS, 2017)

Low power sum of absolute differences architecture using novel hybrid adder. - Rafael Ferreira 001; Bianca Silveira; Mateus Beck Fonseca; Cláudio Machado Diniz; Eduardo A. C. da Costa (LASCAS, 2017)

A power-efficient 4-2 Adder Compressor topology. - Raphael Dornelles; Guilherme Paim; Bianca Silveira; Mateus Fonseca; Eduardo A. C. da Costa; Sergio Bampi (NEWCAS, 2017)

Low power SATD architecture employing multiple sizes Hadamard Transforms and adder compressors. - Bianca Silveira; Rafael S. Ferreira; Guilherme Paim; Cláudio Machado Diniz; Eduardo A. C. da Costa (NEWCAS, 2017)

Power-Efficient Sum of Absolute Differences Hardware Architecture Using Adder Compressors for Integer Motion Estimation Design. - Bianca Silveira; Guilherme Paim; Brunno Abreu; Mateus Grellert; Cláudio Machado Diniz; Eduardo A. C. da Costa; Sergio Bampi (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Multiple Transform Selection Hardware Design for 4K@60fps Real-Time Versatile Video Coding. - Bianca Silveira; Luiz Neto; Daniel Palomino 001; Cláudio Machado Diniz; Guilherme Corrêa 001 (ISCAS, 2022)

The 4-2 Fused Adder-Subtractor Compressor for Low-Power Butterfly-Based Hardware Architectures. - Bianca Silveira; Guilherme Paim; Brunno Alves Abreu; Rafael dos Santos Ferreira; Cláudio Machado Diniz; Eduardo Antônio César da Costa; Sergio Bampi (Circuits Syst. Signal Process., 2022)

Multi-Size Inverse DCT-II Hardware Design for the VVC Decoder. - Bruna Garcia; Bianca Silveira; Cláudio Machado Diniz; Daniel Palomino 001; Guilherme Corrêa 001 (LASCAS, 2023)

A Hardware Design for the Multi-Transform Module of the Versatile Video Coding Standard. - Bianca Silveira; Daniel Palomino 001; Cláudio Machado Diniz; Guilherme Corrêa 001 (SBCCI, 2023)

Machine Learning-Driven Multiple Transform Selection for Low-Complexity VVC Encoding. - Caroline Camargo; Bianca Silveira; Bruno Zatt; Guilherme Ribeiro Corrêa (ISCAS, 2025)

Computational Cost Analysis and Reduction of VVC Multiple Transform Selection. - Caroline Camargo; Bianca Silveira; Guilherme Corrêa 001 (LASCAS, 2025)