Application of Cell-Aware Test on an Advanced 3nm CMOS Technology Library. - Zhan Gao; Santosh Malagi; Min-Chun Hu 002; Joe Swenton; Rogier Baert; Jos Huisken; Bilal Chehab; Kees Goossens; Erik Jan Marinissen (ITC, 2019)

Design enablement of CFET devices for sub-2nm CMOS nodes. - Odysseas Zografos; Bilal Chehab; Pieter Schuddinck; Gioele Mirabelli; Naveen Kakarla; Yang Xiang; Pieter Weckx; Julien Ryckaert (DATE, 2022)

PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch. - Pieter Schuddinck; Fabian M. Bufler; Yang Xiang; Anita Farokhnejad; Gioele Mirabelli; Anne Vandooren; Bilal Chehab; A. Gupta; César Roda Neve; Geert Hellings; Julien Ryckaert (VLSI Technology and Circuits, 2022)

Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3-nm Era. - Giuliano Sisto; Odysseas Zografos; Bilal Chehab; Naveen Kakarla; Yang Xiang; Dragomir Milojevic; Pieter Weckx; Geert Hellings; Julien Ryckaert (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Cell-Aware Test on Various Circuits in an Advanced 3-nm Technology. - Zhan Gao; Min-Chun Hu 002; Rogier Baert; Bilal Chehab; Joe Swenton; Santosh Malagi; Jos Huisken; Kees Goossens; Erik Jan Marinissen (IEEE Des. Test, 2024)