FPGA-based architecture for real-time synaptic plasticity computation. - Bilel Belhadj; Jean Tomas; Olivia Malot; Gilles N'Kaoua; Yannick Bornat; Sylvie Renaud (ICECS, 2008)

Hardware system for biologically realistic, plastic, and real-time spiking neural network simulations. - Sylvain Saïghi; Timothée Levi; Bilel Belhadj; Olivia Malot; Jean Tomas (IJCNN, 2010)

Guaranteeing spike arrival time in multiboard & multichip spiking neural networks. - Bilel Belhadj; Jean Tomas; Olivia Malot; Yannick Bornat; Gilles N'Kaoua; Sylvie Renaud (ISCAS, 2010)

Real-time multi-board architecture for analog spiking neural networks. - Sylvain Saïghi; Jean Tomas; Yannick Bornat; Bilel Belhadj; Olivia Malot; Sylvie Renaud (ISCAS, 2010)

Capacitance of TSVs in 3-D stacked chips a problem?: not for neuromorphic systems! - Antoine Joubert; Marc Duranton; Bilel Belhadj; Olivier Temam; Rodolphe Héliot (DAC, 2012)

Hardware spiking neurons design: Analog or digital? - Antoine Joubert; Bilel Belhadj; Olivier Temam; Rodolphe Héliot (IJCNN, 2012)

Configurable conduction delay circuits for high spiking rates. - Bilel Belhadj; Antoine Joubert; Olivier Temam; Rodolphe Héliot (ISCAS, 2012)

Continuous real-world inputs can open up alternative accelerator designs. - Bilel Belhadj; Antoine Joubert; Zheng Li; Rodolphe Héliot; Olivier Temam (ISCA, 2013)

Advanced technologies for brain-inspired computing. - Fabien Clermidy; Rodolphe Héliot; Alexandre Valentian; Christian Gamrat; Olivier Bichler; Marc Duranton; Bilel Belhadj; Olivier Temam (ASP-DAC, 2014)

The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators. - Bilel Belhadj; Alexandre Valentian; Pascal Vivet; Marc Duranton; Liqiang He; Olivier Temam (CASES, 2014)

A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board Processing. - Andrea Guerrieri; Sahand Kashani-Akhavan; Pasquale Lombardi; Bilel Belhadj; Paolo Ienne (AHS, 2018)

LEOSoC: An Open-Source Cross-Platform Embedded Linux Library for Managing Hardware Accelerators in Heterogeneous System-on-Chips(Abstract Only). - Andrea Guerrieri; Sahand Kashani-Akhavan; Mikhail Asiatici; Pasquale Lombardi; Bilel Belhadj; Paolo Ienne (FPGA, 2018)